SNAA411 September   2024 CDCLVC1102 , CDCLVC1103 , CDCLVC1104 , CDCLVC1110 , CDCLVD1204 , LMK00301 , LMK00304 , LMK00306 , LMK00308 , LMK01801 , LMK04832 , LMK1C1102 , LMK1C1103 , LMK1C1104 , LMK1C1106 , LMK1C1108 , LMK1D1204 , LMK1D1208 , LMX2485 , LMX2491 , LMX2572 , LMX2592 , LMX2594 , LMX2595 , LMX2820

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Generic Clock Tree
  5. 2Sine Wave Slew Rate Requirement
  6. 3Current Approach vs Clock Buffer
  7. 4Clock Buffer Implementation
    1. 4.1 Clock Buffer Common Input Stages
    2. 4.2 Choosing Between Internal or External DC Bias
    3. 4.3 Single Ended or LVCMOS Signal
    4. 4.4 Differential Inputs
  8. 5Performance Improvements, Results With Clock Buffer
    1. 5.1 FSWP Phase Noise Analyzer Measurements Case
    2. 5.2 TI LMX2820 Noise Improvements With Sine to Square Wave Clock Buffer
      1. 5.2.1 LMX2820 Phase Noise and RMS Jitter Results Summary
  9. 6Sine to Square Wave Clock Buffer Comparison
    1. 6.1 LMK1C110x Additive Noise vs Others
  10. 7Summary
  11. 8References

6.1 LMK1C110x Additive Noise vs Others

As described in Section 5.1 that noise measurement equipment can give optimistic results for additive phase noise results due to slew rate issue. An alternative cascaded setup is used to model the actual additive phase noise of LMK1C110x vs competition's best performing buffer. We use cascaded buffers and treat the first buffer as source. Phase noise setup for the buffer is shown in Figure 6-2

Additive Noise Buffer Setup Figure 6-2 Additive Noise Buffer Setup

Following additive phase noise plots compare the performance of TI buffer vs competition.

Total Phase Noise at 10MHz OutputFigure 6-3 Total Phase Noise at 10MHz Output
Total Phase Noise at 100MHz OutputFigure 6-5 Total Phase Noise at 100MHz Output
RMS Jitter (12kHz - 1MHz): 10MHz Output - LMK1C110x vs Competition Figure 6-7 RMS Jitter (12kHz - 1MHz): 10MHz Output - LMK1C110x vs Competition
RMS Jitter (12kHz - 20MHz): 100MHz Output - LMK1C110x vs CompetitionFigure 6-9 RMS Jitter (12kHz - 20MHz): 100MHz Output - LMK1C110x vs Competition
Additive Phase Noise at 10MHz Output
Noise Floor = –181.9dBc/Hz, 1/f Noise = 178.5dBc/Hz at 10kHz
Figure 6-4 Additive Phase Noise at 10MHz Output
Additive Phase Noise at 100MHz Output
Noise Floor = –177.9dBc/Hz, 1/f Noise = –164.3dBc/Hz at 10kHz
Figure 6-6 Additive Phase Noise at 100MHz Output
RMS Jitter (10Hz - 1MHz): 12MHz Output - LMK1C110x vs CompetitionFigure 6-8 RMS Jitter (10Hz - 1MHz): 12MHz Output - LMK1C110x vs Competition
RMS Jitter (10Hz - 50MHz): 100MHz Output - LMK1C110x vs CompetitionFigure 6-10 RMS Jitter (10Hz - 50MHz): 100MHz Output - LMK1C110x vs Competition
Table 6-2 LMK1C110x Additive Jitter Comparison vs Competition
Parameter LMK1C110x Competition LVCMOS Unit
Frequency 10MHz 100MHz 10MHz 100MHz fs
Additive Jitter (10Hz - 1MHz) 21.87 - 104.82 -
Additive Jitter (12kHz - 1MHz) 21.39 - 104.41 -
Additive Jitter (12kHz - 20MHz) - 4.51 - 133.35
Additive Jitter (10Hz - 50MHz) - 16.38 - 200.90