SNLA340 October   2022 DP83TC811R-Q1 , DP83TC811S-Q1 , DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TC814R-Q1 , DP83TC814S-Q1 , DP83TG720R-Q1 , DP83TG720S-Q1

 

  1.   DP83TC811, DP83TC812, DP83TC814, DP83TG720 Hardware Rollover Document
  2.   Trademarks
  3. 1Introduction
  4. 2Device Comparison
    1. 2.1 Pin Map Comparison
      1. 2.1.1 DP83TC811S
      2. 2.1.2 DP83TC811R
      3. 2.1.3 DP83TC812S
      4. 2.1.4 DP83TC812R
      5. 2.1.5 DP83TC814S
      6. 2.1.6 DP83TC814R
      7. 2.1.7 DP83TG720S
      8. 2.1.8 DP83TG720R
    2. 2.2 Feature Comparison
    3. 2.3 Pin Comparison Table
      1. 2.3.1 Strap Comparison
        1. 2.3.1.1 PHY Address Straps
        2. 2.3.1.2 MAC Interface, Master/Slave, Autonomous Strap
    4. 2.4 Power Supply Comparison
    5. 2.5 Design Parameters
    6. 2.6 MDI Comparison
    7. 2.7 CMC Comparison
    8. 2.8 SGMII Reference Schematics
    9. 2.9 RGMII Reference Schematics
  5. 3Summary

2.3.1 Strap Comparison

In order to maintain pin compatibility, the features associated with each strap pins are same for all four devices. There are differences in their implementation and strap resistor selection. DP83TC811 uses 4 level strap on all pins. DP83TC812/814, and DP83TG720 use 3 level straps for PHY Address and 2 level straps for all other functions.