SPRUHZ7K August 2015 – April 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL
DSP_EDMA traffic TC0 and TC1 controllers "Active" or "Idle" status: can be monitored in DSP_SYSTEM located:
The default burst size for both the DSP_EDMA_TC0 and DSP_EDMA_TC1 can be defined in DSP_SYSTEM register. This is achieved via programming:
There are also other DSP_EDMA controls associated with DSP_NoC interconnect pressure settings. For more details, refer to the Section 5.3.8.
The 3 error events associated with the DSP_EDMA_CC, DSP_EDMA_TC0 and DSP_EDMA_TC1 are exported outside the DSP C66x CorePac in the subsystem, and are able to trigger the ERRINT_IRQ aggregated interrupt output. See also corresponding "tpcc_errint_level", "tptc_errint0_level" and "tptc_errint1_level" events, respectively in the Table 5-5.
The DSP_EDMA_CC, DSP_EDMA_TC0 and DSP_EDMA_TC1 events are NOT exported outside DSP subsystem. However they are merged (OR-ed) along with other error event sources within the DSP subsystem to produce a single ERRINT_IRQ interrupt exported outside the DSP subsystem.
For more details on ERRINT_IRQ generation and asscoiated event registers at DSP_SYSTEM level, refer to the Section 5.3.4.2.2.
The DSP_SYSTEM logic is assigned to route the external DMA requests to the EDMA hardware request inputs. Additionally, EDMA events can conditionally wake-up the DSP system from a low power mode, via software enabling DSP_SYSTEM MWakeup handshake with the device PRCM. This mechanism is described in the Section 5.3.5.
The programmable muxing of various external DMA request sources to the DSP EDMA. DMA_DSP1_DREQ_x input lines (where x=0 to 19) is covered in the DMA_CROSSBAR Module Functional Description, of the Control Module.
DSP1 subsystem external DMA request sources: For the default DSP1 external DMA request sources, routed via the device DMA_CROSSBAR to the DSP1_EDMA channel controller inputs (DMA_DSP1_DREQ_i), respectively, refer to the Section 5.3.5.