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AM5718

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Sitara processor: Arm Cortex-A15 & DSP, multimedia

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Errata

AM5718

ACTIVE
Data sheet Order now

Product details

Arm CPU 1 Arm Cortex-A15 Arm (max) (MHz) 1500 Coprocessors 2 Dual Arm Cortex-M4 CPU 32-bit Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 3 LCD Protocols Ethernet, ICSS, Profibus, Profinet Ethernet MAC 1-Port 10/100/1000, 2-Port 1Gb switch, 4-Port 10/100 PRU EMAC, 6-Port 10/100 PRU EMAC PCIe 2 PCIe Gen 2 Operating system Android, Linux, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection Rating Automotive, Catalog Power supply solution LP8733 + LP873220, TPS65916 Operating temperature range (°C) -40 to 125
Arm CPU 1 Arm Cortex-A15 Arm (max) (MHz) 1500 Coprocessors 2 Dual Arm Cortex-M4 CPU 32-bit Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 3 LCD Protocols Ethernet, ICSS, Profibus, Profinet Ethernet MAC 1-Port 10/100/1000, 2-Port 1Gb switch, 4-Port 10/100 PRU EMAC, 6-Port 10/100 PRU EMAC PCIe 2 PCIe Gen 2 Operating system Android, Linux, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection Rating Automotive, Catalog Power supply solution LP8733 + LP873220, TPS65916 Operating temperature range (°C) -40 to 125
FCBGA (ABC) 760 529 mm² 23 x 23
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP cores
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • DDR3/DDR3L External Memory Interface (EMIF) module
    • Supports up to DDR3-1333 (667 MHz)
    • Up to 2GB across single chip select
  • 2x Dual Arm® Cortex®-M4 coprocessors (IPU1 and IPU2)
  • IVA-HD subsystem
    • 4K @ 15fps encode and decode support for H.264 CODEC
    • Other CODECs are up to 1080p60
  • Display subsystem
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video inputs and video outputs
    • 2D and 3D graphics
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2x dual-core Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS)
  • Accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Available single-core PowerVR® SGX544 3D GPU
  • Secure boot support
    • Hardware-enforced root-of-trust
    • Customer programmable keys (SR 2.1)
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Cryptographic acceleration support
    • Supports cryptographic cores
      • AES – 128/192/256-bits key sizes
      • 3DES – 56/112/168-bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • True random number generator
    • DMA support
  • Debug security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted Execution Environment (TEE) support
    • Arm® TrustZone® based TEE
    • Extensive firewall support for isolation
    • Secure DMA path and interconnect
    • Secure Watchdog/Timer/IPC
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-Port Gigabit Ethernet switch
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Five high speed Inter-Integrated Circuit (I2C™) ports
  • HDQ/1-Wire® interface
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad Serial Peripheral Interface (QSPI)
  • SATA Gen2 interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High Speed USB 2.0 dual-role device
  • Four MultiMedia Card/Secure Digital®/Secure Digital Input Output interfaces (MMC™/SD®/SDIO)
  • PCI-Express® (PCIe®) revision 3.0 subsystems with two 5-Gbps lanes
    • One 2-lane Gen2-compliant port
    • or Two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI® Camera Serial Interface 2 (CSI-2)
  • Up to 215 General-Purpose I/O (GPIO) pins
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-pin BGA
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP cores
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • DDR3/DDR3L External Memory Interface (EMIF) module
    • Supports up to DDR3-1333 (667 MHz)
    • Up to 2GB across single chip select
  • 2x Dual Arm® Cortex®-M4 coprocessors (IPU1 and IPU2)
  • IVA-HD subsystem
    • 4K @ 15fps encode and decode support for H.264 CODEC
    • Other CODECs are up to 1080p60
  • Display subsystem
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video inputs and video outputs
    • 2D and 3D graphics
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2x dual-core Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS)
  • Accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Available single-core PowerVR® SGX544 3D GPU
  • Secure boot support
    • Hardware-enforced root-of-trust
    • Customer programmable keys (SR 2.1)
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Cryptographic acceleration support
    • Supports cryptographic cores
      • AES – 128/192/256-bits key sizes
      • 3DES – 56/112/168-bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • True random number generator
    • DMA support
  • Debug security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted Execution Environment (TEE) support
    • Arm® TrustZone® based TEE
    • Extensive firewall support for isolation
    • Secure DMA path and interconnect
    • Secure Watchdog/Timer/IPC
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-Port Gigabit Ethernet switch
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Five high speed Inter-Integrated Circuit (I2C™) ports
  • HDQ/1-Wire® interface
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad Serial Peripheral Interface (QSPI)
  • SATA Gen2 interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High Speed USB 2.0 dual-role device
  • Four MultiMedia Card/Secure Digital®/Secure Digital Input Output interfaces (MMC™/SD®/SDIO)
  • PCI-Express® (PCIe®) revision 3.0 subsystems with two 5-Gbps lanes
    • One 2-lane Gen2-compliant port
    • or Two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI® Camera Serial Interface 2 (CSI-2)
  • Up to 215 General-Purpose I/O (GPIO) pins
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-pin BGA

AM571x Sitara™ processors are Arm® applications processors built to meet the intense processing needs of modern embedded products.

AM571x devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by a single-core Arm® Cortex®-A15 RISC CPU with Arm® Neon™ extensions and a TI C66x VLIW floating-point DSP core. The Arm® processor lets developers keep control functions separate from vision algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm® and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment is available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The AM571x Sitara Arm processor family is qualified according to the AEC-Q100 Standard.

AM571x Sitara™ processors are Arm® applications processors built to meet the intense processing needs of modern embedded products.

AM571x devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by a single-core Arm® Cortex®-A15 RISC CPU with Arm® Neon™ extensions and a TI C66x VLIW floating-point DSP core. The Arm® processor lets developers keep control functions separate from vision algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm® and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment is available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The AM571x Sitara Arm processor family is qualified according to the AEC-Q100 Standard.
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Technical documentation

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Type Title Date
* Data sheet AM571x Sitara™ Processors Silicon Revision 2.0 and 2.1 datasheet (Rev. I) PDF | HTML 15 Nov 2019
* Errata AM571x (SR 2.1, 2.0, 1.0) and AM570x (SR 2.1, 2.0) Sitara Processors Errata (Rev. G) PDF | HTML 08 Jan 2021
* User guide AM571x and AM570x Sitara Processor Technical Reference Manual (Rev. K) PDF | HTML 14 May 2024
Application note Industrial Communication Protocols Supported on Sitara™ Processors (Rev. E) PDF | HTML 10 May 2024
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 Apr 2024
Application note Sitara Processor Power Distribution Networks: Implementation and Analysis (Rev. G) PDF | HTML 28 Aug 2023
Application note Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 24 May 2023
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24 Feb 2023
Application note PRU-ICSS Feature Comparison (Rev. G) PDF | HTML 11 Oct 2022
Application brief Adding Real-Time Communication to Linux (Rev. A) 07 May 2021
Application note Ethernet PHY Configuration Using MDIO for Industrial Applications (Rev. A) 07 May 2021
More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 16 Dec 2020
E-book Ein Techniker-Leitfaden für Industrieroboter-Designs 25 Mar 2020
E-book E-book: An engineer’s guide to industrial robot designs 12 Feb 2020
Application note AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 06 Jan 2020
EVM User's guide AM571x Industrial Development Kit (IDK) Evaluation Module (EVM) Hardware UG (Rev. D) 11 Sep 2019
Application note AM57x Schematic Checklist (Rev. B) 09 Jul 2019
Application note AM571x/AM572x/AM574x PCB Escape Routing (Rev. A) 19 Mar 2019
White paper Bringing deep learning to embedded systems (Rev. A) 26 Feb 2019
Application note Common EOS pitfalls in board design 13 Feb 2019
Application note AM57xx Hardware Design Guide PDF | HTML 25 Jan 2019
Application note PRU-ICSS Getting Started Guide on TI-RTOS (Rev. A) 18 Jan 2019
Application note PRU Read Latencies (Rev. A) 21 Dec 2018
Application note PRU-ICSS Getting Starting Guide on Linux (Rev. A) 10 Dec 2018
White paper Ensuring real-time predictability (Rev. B) 04 Dec 2018
Application note PRU-ICSS EtherCAT Slave Troubleshooting Guide 07 Nov 2018
Application note PRU-ICSS / PRU_ICSSG Migration Guide 05 Nov 2018
White paper Secure Boot on embedded Sitara™ processors (Rev. A) 13 Oct 2018
Application note AM571x Thermal Considerations 05 Oct 2018
User guide How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 24 Sep 2018
Application note MMC DLL Tuning (Rev. B) 31 Jul 2018
Application note AM574x, AM572x, and AM571x Compatibility Guide (Rev. E) 26 Apr 2018
Application note HSR/PRP Solutions on Sitara Processors for Grid Substation Communication 17 Apr 2018
User guide TPS659037 user's guide to power AM574x, AM572x, and AM571x (Rev. F) 16 Mar 2018
User guide PRU Assembly Instruction User Guide 16 Feb 2018
Application note 2D Object Recognition for Industrial Machine Vision with Processor SDK on Sitara 07 Feb 2018
Application note AM57xx BGA PCB Design 25 Aug 2017
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14 Aug 2017
Application note IODELAY Application Note for AM57xx Devices (Rev. A) 03 Aug 2017
Application note Processor-SDK RTOS Power Management and Measurement 02 Aug 2017
Application note AM571x Power Estimation Tool 19 Jul 2017
Application note Processor SDK RTOS Audio Benchmark Starter Kit 12 Apr 2017
Application note AM571x Power Consumption Summary 27 Mar 2017
Application note DSPLIB for Processor SDK RTOS 04 Nov 2016
Application note AM57x Processor SDK Linux: Customization of Multicore Application to Run on a Ne 06 Oct 2016
Application note Keystone EDMA FAQ 01 Sep 2016
White paper Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A) 11 Aug 2016
Technical article Clove: Low-Power video solutions based on Sitara™ AM57x processors PDF | HTML 21 Jul 2016
Technical article Hypervisors in embedded systems PDF | HTML 07 Jul 2016
Technical article Control-level design challenges in smart factory automation systems PDF | HTML 20 May 2016
Technical article Expanding industrial communication development PDF | HTML 09 May 2016
Product overview Sitara™ AM5x processor with ARM® Cortex™-A15 core (Rev. A) 22 Jan 2016
Application note TI DSP Benchmarking 13 Jan 2016
Technical article AM57x processors for smart grid applications PDF | HTML 21 Oct 2015
Technical article There’s a core for that PDF | HTML 14 Oct 2015
Application note AM572x GP EVM Power Simulations 08 Oct 2015
Application note Plastic Ball Grid Array [PBGA] Application Note (Rev. B) 13 Aug 2015
White paper Mainline Linux™ ensures stability and innovation 27 Mar 2014
White paper Scalable Solutions for HMI 21 Nov 2013
White paper Linaro Speeds Development in TI Linux SDKs 27 Aug 2013
White paper The Yocto Project:Changing the way embedded Linux software solutions are develop 14 Mar 2013
User guide Flip Chip Ball Grid Array Package Reference Guide (Rev. A) 23 May 2005
Application note AN-1281 Bumped Die (Flip Chip) Packages (Rev. A) 01 May 2004
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 31 Jul 0202

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