SPRUHZ7K August 2015 – April 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL
Table 14-379 and Table 14-380 summarize the integration of the module in the device.
Module Instance | Attributes |
Power Domain | |
L4_PER1, L4_PER2, L4_PER3 | PD_COREAON |
L4_CFG | PD_COREAON |
L4_WKUP | PD_WKUPAON |
Clocks | ||||
Module Instance | Destination Signal Name | Source Signal Name | Source | Description |
L4_PER1 | L4_PER1_CLK | L4PER_L3_GICLK | PRCM module | Functional and interface clock |
L4_PER2 | L4_PER2_CLK | L4PER_L3_GICLK | PRCM module | Functional and interface clock |
L4_PER3 | L4_PER3_CLK | L4PER_L3_GICLK | PRCM module | Functional and interface clock |
L4_CFG | L4_CFG_CLK | L4CFG_L3_GICLK | PRCM module | Functional and interface clock |
L4_WKUP | L4_WKUP_CLK | WKUPAON_GICLK | PRCM module | Functional and interface clock |
Resets | ||||
Module Instance | Destination Signal Name | Source Signal Name | Source | Description |
L4_PER1, L4_PER2, L4_PER3 | L4_PER_RST | L4_PER_RST | PRCM module | Reset of L4_PERx interconnect |
L4_PER_RET_RST | L4_PER_PWRON_RET_RST | PRCM module | Reset of L4_PERx interconnect retention registers. For information about retention reset, see Chapter 3, Power, Reset, and Clock Management. | |
L4_CFG | L4_CFG_RST | CORE_RST | PRCM module | Reset of L4_CFG interconnect. |
L4_CFG_RET_RST | CORE_PWRON_RET_RST | PRCM module | Reset of L4_CFG interconnect retention registers. For information about retention reset, see Chapter 3, Power, Reset, and Clock Management. | |
L4_WKUP | L4_WKUP_RST | WKUPAON_RST | PRCM module | Reset of L4_WKUP interconnect |
L4_WKUP_RET_RST | L4_WKUP_RET_RST | PRCM module | Reset of L4_WKUP interconnect. For information about retention reset, see Chapter 3, Power, Reset, and Clock Management. |