SPRUHZ7K August 2015 – April 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL
Table 14-12 and Table 14-13 list the exported reset values and mapping, respectively.
MRM_PERMISSION_REGION_LOW_j [15:12] | MRM_PERMISSION_REGION_LOW_j [11:0] |
---|---|
0x0 | 0xFFF |
0xF | 0xFFF |
0x0 | 0xFFF |
0x2 | 0xFFF |
CTRL_CORE_L3_HW_FW_EXPORTED_VALUES_CONF_LOCK_1 and CTRL_CORE_L3_HW_FW_EXPORTED_VALUES_CONF_DBG_1 Bits | Slave NIU Firewall |
---|---|
[0] | GPMC |
[3] | L3 RAM1 |
[4] | DSS |
[6] | GPU |
[7] | IVAHD SL2IF |
[8] | IVAHD CONFIG |
[11] | EMIF and MA_MPU_NTTP |
[12] | DEBUGSS |
[13] | CT_TBR |
[20] | PCIESS1 |
[21] | PCIESS2 |
[22] | IPU1 |
[23] | IPU2 |
[24] | VCP1(1) |
[25] | VCP2(1) |
[26] | MCASP1 |
[27] | MCASP2 |
[28] | MCASP3 |
[31] | BB2D |
CTRL_CORE_L3_HW_FW_EXPORTED_VALUES_CONF_LOCK_2 and CTRL_CORE_L3_HW_FW_EXPORTED_VALUES_CONF_DBG_2 Bits | Slave NIU Firewall |
---|---|
[0] | DSP1 |
[6] | PRU-ICSS1 |
[7] | PRU-ICSS2 |
[8] | QSPI |
[9] | EDMA TC |
[10] | EDMA TPCC |
For more information, see Chapter 18, Control Module.