SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
Module Name | Module Base Address | Size |
---|---|---|
PCIe_SS1_EP_CFG_PCIe | ECAM_Param_Base_Addr(1) + 0x2000 0000 | 4 KiB |
PCIe_SS1_EP_CFG_DBICS | 0x5100 0000 | 128 Bytes |
PCIe_SS1_RC_CFG_DBICS | 0x5100 0000 | 128 Bytes |
PCIe_SS1_PL_CONF | 0x5100 0700 | 500 Bytes |
PCIe_SS1_EP_CFG_DBICS2 | 0x5100 1000 | 128 Bytes |
PCIe_SS1_RC_CFG_DBICS2 | 0x5100 1000 | 128 Bytes |
PCIe_SS1_TI_CONF | 0x5100 2000 | 332 Bytes |
Module Name | Module Base Address | Size |
---|---|---|
PCIe_SS2_EP_CFG_PCIe | ECAM_Param_Base_Addr(1) + 0x3000 0000 | 4 KiB |
PCIe_SS2_EP_CFG_DBICS | 0x5180 0000 | 128 Bytes |
PCIe_SS2_RC_CFG_DBICS | 0x5180 0000 | 128 Bytes |
PCIe_SS2_PL_CONF | 0x5180 0700 | 500 Bytes |
PCIe_SS2_EP_CFG_DBICS2 | 0x5180 1000 | 128 Bytes |
PCIe_SS2_RC_CFG_DBICS2 | 0x5180 1000 | 128 Bytes |
PCIe_SS2_TI_CONF | 0x5180 2000 | 332 Bytes |
The ECAM_Param_Base_Addr variable is the 16-bit base address (this address is 4 KiB-aligned with value in the range: 0x0000_0000 - 0x0FFF_F000) of the relevant EP function descriptor (relevant EP's function PCIe standard and PL configuration registers) in a contiguous 256-MiB ECAM space (0x0000_0000 - 0x0FFF_FFFF). For more information on the PCIe ECAM configuration space mapping mechanism, refer to the section PCI Express Enhanced Configuration Access Mechanism (ECAM), in the PCI Express Base 3.0 Specification, Revision 1.0.
For information on the EP's function PL register offsets and descriptions, refer to the Section 24.9.7.5.