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CDCS503

ACTIVE

Clock buffer / clock multiplier with optional SSC

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Data sheet

CDCS503

ACTIVE
Data sheet Order now

Product details

Function Spread-spectrum clock generator Number of outputs 1 Output frequency (max) (MHz) 108 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS Output type LVCMOS Operating temperature range (°C) -40 to 85 Features Pin programmable, Spread-spectrum clocking (SSC) Rating Catalog
Function Spread-spectrum clock generator Number of outputs 1 Output frequency (max) (MHz) 108 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS Output type LVCMOS Operating temperature range (°C) -40 to 85 Features Pin programmable, Spread-spectrum clocking (SSC) Rating Catalog
TSSOP (PW) 8 19.2 mm² 3 x 6.4
  • Part of a Family of Easy to use Clock Generator Devices
    With Optional SSC
  • Clock Multiplier With Selectable Output Frequency and
    Selectable SSC
  • SSC Controllable via 2 External Pins
    • ±0%, ±0.5%, ±1%, ±2% Center Spread
  • Frequency Multiplication Selectable Between x1 or x4
    With One External Control Pin
  • Output Disable via Control Pin
  • Single 3.3V Device Power Supply
  • Wide Temperature Range –40°C to 85°C
  • Low Space Consumption by 8 Pin TSSOP Package
  • APPLICATIONS
    • Consumer and Industrial Applications requiring
      EMI reduction through Spread Spectrum Clocking
      and/or Clock Multiplication
  • Part of a Family of Easy to use Clock Generator Devices
    With Optional SSC
  • Clock Multiplier With Selectable Output Frequency and
    Selectable SSC
  • SSC Controllable via 2 External Pins
    • ±0%, ±0.5%, ±1%, ±2% Center Spread
  • Frequency Multiplication Selectable Between x1 or x4
    With One External Control Pin
  • Output Disable via Control Pin
  • Single 3.3V Device Power Supply
  • Wide Temperature Range –40°C to 85°C
  • Low Space Consumption by 8 Pin TSSOP Package
  • APPLICATIONS
    • Consumer and Industrial Applications requiring
      EMI reduction through Spread Spectrum Clocking
      and/or Clock Multiplication

The CDCS503 is a spread spectrum capable, LVCMOS Input Clock Buffer with selectable frequency multiplication.

It shares major functionality with the CDCS502 but utilizes a LVCMOS input stage instead of the crystal input stage of the CDCS502. Also an Output Enable pin has been added to the CDCS503.

The device accepts a 3.3V LVCMOS signal at the input.

The input signal is processed by a PLL, whose output frequency is either equal to the input frequency or multiplied by the factor of 4.

The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock frequency with a triangular modulation.

By this, the device can generate output frequencies between 8MHz and 108MHz with or without SSC.

A separate control pin can be used to enable or disable the output. The CDCS503 operates in 3.3V environment.

It is characterized for operation from –40°C to 85°C, and available in an 8-pin TSSOP package.

The CDCS503 is a spread spectrum capable, LVCMOS Input Clock Buffer with selectable frequency multiplication.

It shares major functionality with the CDCS502 but utilizes a LVCMOS input stage instead of the crystal input stage of the CDCS502. Also an Output Enable pin has been added to the CDCS503.

The device accepts a 3.3V LVCMOS signal at the input.

The input signal is processed by a PLL, whose output frequency is either equal to the input frequency or multiplied by the factor of 4.

The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock frequency with a triangular modulation.

By this, the device can generate output frequencies between 8MHz and 108MHz with or without SSC.

A separate control pin can be used to enable or disable the output. The CDCS503 operates in 3.3V environment.

It is characterized for operation from –40°C to 85°C, and available in an 8-pin TSSOP package.
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Technical documentation

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Type Title Date
* Data sheet Clock Buffer / Clock Multiplier with optional SSC datasheet 23 Mar 2009
Application note Spread Spectrum Clocking Using the CDCS502/503 19 Aug 2009

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