The ADC08D1520 is an 8–Bit, dual channel, low power, high performance CMOS
analog-to-digital converter that builds upon the ADC08D1000 platform. The ADC08D1520 digitizes
signals to 8 bits of resolution at sample rates up to 1.7 GSPS. It has expanded features compared
to the ADC08D1000, which include a test pattern output for system debug, clock phase adjust, and
selectable output demultiplexer modes. Consuming a typical 2.0W in Demultiplex Mode at 1.5 GSPS
from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full
operating temperature range. The unique folding and interpolating architecture, the fully
differential comparator design, the innovative design of the internal sample-and-hold amplifier and
the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist,
producing a high 7.2 Effective Number of Bits (ENOB) with a 748 MHz input signal and a 1.5 GHz
sample rate while providing a 10-18 Code Error Rate (C.E.R.) Output
formatting is offset binary and the Low Voltage Differential Signaling (LVDS) digital outputs are
compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between
0.8V and 1.2V.
Each converter has a selectable output demultiplexer which feeds two LVDS buses. If the
1:2 Demultiplexed Mode is selected, the output data rate is reduced to half the input sample rate
on each bus. When Non-Demultiplexed Mode is selected, the output data rate on channels DI and DQ
are at the same rate as the input sample clock. The two converters can be interleaved and used as a
single 3 GSPS ADC.
The converter typically consumes less than 2.9 mW in the Power Down Mode and is available
in a 128-pin, thermally enhanced, multi-layer ceramic quad package and operates over the Military
(-55°C ≤ TA ≤ +125°C) temperature range.
The ADC08D1520 is an 8–Bit, dual channel, low power, high performance CMOS
analog-to-digital converter that builds upon the ADC08D1000 platform. The ADC08D1520 digitizes
signals to 8 bits of resolution at sample rates up to 1.7 GSPS. It has expanded features compared
to the ADC08D1000, which include a test pattern output for system debug, clock phase adjust, and
selectable output demultiplexer modes. Consuming a typical 2.0W in Demultiplex Mode at 1.5 GSPS
from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full
operating temperature range. The unique folding and interpolating architecture, the fully
differential comparator design, the innovative design of the internal sample-and-hold amplifier and
the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist,
producing a high 7.2 Effective Number of Bits (ENOB) with a 748 MHz input signal and a 1.5 GHz
sample rate while providing a 10-18 Code Error Rate (C.E.R.) Output
formatting is offset binary and the Low Voltage Differential Signaling (LVDS) digital outputs are
compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between
0.8V and 1.2V.
Each converter has a selectable output demultiplexer which feeds two LVDS buses. If the
1:2 Demultiplexed Mode is selected, the output data rate is reduced to half the input sample rate
on each bus. When Non-Demultiplexed Mode is selected, the output data rate on channels DI and DQ
are at the same rate as the input sample clock. The two converters can be interleaved and used as a
single 3 GSPS ADC.
The converter typically consumes less than 2.9 mW in the Power Down Mode and is available
in a 128-pin, thermally enhanced, multi-layer ceramic quad package and operates over the Military
(-55°C ≤ TA ≤ +125°C) temperature range.