CD4028B

ACTIVE

CMOS BCD-to-Decimal or Binary-to-Octal Decoders/Drivers

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Data sheet

document-pdfAcrobat CD4028B TYPES datasheet (Rev. C)

CD4028B

ACTIVE

Data sheet

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Product details

Technology family

CD4000

Number of channels

1

Operating temperature range (°C)

-55 to 125

Rating

Catalog

Supply current (max) (µA)

3000

Technology family

CD4000

Number of channels

1

Operating temperature range (°C)

-55 to 125

Rating

Catalog

Supply current (max) (µA)

3000

PDIP (N)

16

181.42 mm² 19.3 x 9.4

SOIC (D)

16

59.4 mm² 9.9 x 6

SOP (NS)

16

79.56 mm² 10.2 x 7.8

TSSOP (PW)

16

32 mm² 5 x 6.4

BCD-to-decimal decoding or binary-to-octal decoding
High decoded output drive capability
"Positive logic" inputs and outputs……decoded outputs go high on selection
Medium-speed operation… t_PHL, t_PLH = 80 ns (typ.) @ V_DD = 10 V
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
        1 V at V_DD = 5 V
        2 V at V_DD = 10 V
     2.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Code conversion
- Indicator-tube decoder
- Address decoding-memory selection control

Data sheet acquired from Harris Semiconductor

BCD-to-decimal decoding or binary-to-octal decoding
High decoded output drive capability
"Positive logic" inputs and outputs……decoded outputs go high on selection
Medium-speed operation… t_PHL, t_PLH = 80 ns (typ.) @ V_DD = 10 V
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
        1 V at V_DD = 5 V
        2 V at V_DD = 10 V
     2.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Code conversion
- Indicator-tube decoder
- Address decoding-memory selection control

Data sheet acquired from Harris Semiconductor

CD4028 types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all 4 inputs, decoding-logic gates, and 10 output buffers. A BCD code applied to the four input, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = "0". High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications.

The CD4028B-Series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4028 types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all 4 inputs, decoding-logic gates, and 10 output buffers. A BCD code applied to the four input, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = "0". High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications.

The CD4028B-Series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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Technical documentation

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	Type	Title	Date
*	Data sheet	CD4028B TYPES datasheet (Rev. C)	14 Oct 2003
	Selection guide	Logic Guide (Rev. AB)	12 Jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 Dec 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 Jan 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 Jul 2004
	User guide	Signal Switch Data Book (Rev. A)	14 Nov 2003
	Application note	Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics	03 Dec 2001

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML

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Package	Pins	CAD symbols, footprints & 3D models
PDIP (N)	16	Ultra Librarian
SOIC (D)	16	Ultra Librarian
SOP (NS)	16	Ultra Librarian
TSSOP (PW)	16	Ultra Librarian

TI's Standard Terms and Conditions for Evaluation Items apply.

CD4028B

CMOS BCD-to-Decimal or Binary-to-Octal Decoders/Drivers

CD4028B

Product details

Technical documentation

Design & development

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

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