Produktdetails

Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 12, 16, 20, 36, 44 Power supply voltage - dual (V) +/-10, +/-15, +/-18, +/-22, +/-5 Protocols Analog Ron (typ) (Ω) 250 CON (typ) (pF) 20 ON-state leakage current (max) (µA) 0.025 Supply current (typ) (µA) 250 Bandwidth (MHz) 120 Operating temperature range (°C) -40 to 125 Features 1.8-V compatible control inputs, Break-before-make, Fail-safe logic, Overvoltage protection Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 44 Supply voltage (max) (V) 44 Negative rail supply voltage (max) (V) -44
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 12, 16, 20, 36, 44 Power supply voltage - dual (V) +/-10, +/-15, +/-18, +/-22, +/-5 Protocols Analog Ron (typ) (Ω) 250 CON (typ) (pF) 20 ON-state leakage current (max) (µA) 0.025 Supply current (typ) (µA) 250 Bandwidth (MHz) 120 Operating temperature range (°C) -40 to 125 Features 1.8-V compatible control inputs, Break-before-make, Fail-safe logic, Overvoltage protection Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 44 Supply voltage (max) (V) 44 Negative rail supply voltage (max) (V) -44
TSSOP (PW) 16 32 mm² 5 x 6.4 WQFN (RRP) 16 16 mm² 4 x 4
  • Wide supply range:
    • Dual supply: ±5 V to ±22 V
    • Single supply: 8 V to 44 V
  • Integrated fault protection:
    • Overvoltage protection, source to supplies or source to drain: ±85 V
    • Overvoltage protection: ±60 V
    • Powered-off protection: ±60 V
    • Non-fault channels continue to operate
    • Known state without logic inputs present
    • Output clamped to the supply in overvoltage condition
  • Latch-up immune
  • 1.8-V Logic capable
  • Fail-safe logic: up to 44 V independent of supply
  • Integrated pull-down resistor on logic pins
  • Break-before-make switching
  • Industry standard TSSOP and smaller WQFN packages
  • Wide supply range:
    • Dual supply: ±5 V to ±22 V
    • Single supply: 8 V to 44 V
  • Integrated fault protection:
    • Overvoltage protection, source to supplies or source to drain: ±85 V
    • Overvoltage protection: ±60 V
    • Powered-off protection: ±60 V
    • Non-fault channels continue to operate
    • Known state without logic inputs present
    • Output clamped to the supply in overvoltage condition
  • Latch-up immune
  • 1.8-V Logic capable
  • Fail-safe logic: up to 44 V independent of supply
  • Integrated pull-down resistor on logic pins
  • Break-before-make switching
  • Industry standard TSSOP and smaller WQFN packages

The TMUX7308F and TMUX7309F are modern complementary metal-oxide semiconductor (CMOS) analog multiplexers in 8:1 (single ended) and 4:1 (differential) configurations. The devices work well with dual supplies (±5 V to ±22 V), a single supply (8 V to 44 V), or asymmetric supplies (such as V DD = 12 V, V SS = –5 V). The overvoltage protection is available in powered and powered-off conditions, making the TMUX7308F and TMUX7309F devices suitable for applications where power supply sequencing cannot be precisely controlled.

The device blocks fault voltage up to +60 V or –60 V relative to ground in both powered and powered-off conditions. When no power supplies are present, the switch channels remain in the OFF state regardless of switch input conditions and logic control status. Under normal operation conditions, if the analog input signal level on any Sx pin exceeds the supply voltage (V DD or V SS) by a threshold voltage (V T), the channel turns OFF and the Sx pin becomes high impedance. When the fault channel is selected, the drain pin (D or Dx) is pulled to the supply (V DD or V SS) that was exceeded.

The low capacitance, low charge injection, and integrated fault protection enables the TMUX7308F and TMUX7309F devices to be used in front end data acquisition applications where high performance and high robustness are both critical. The devices are available in a standard TSSOP package and smaller WQFN package (ideal if PCB space is limited).

The TMUX7308F and TMUX7309F are modern complementary metal-oxide semiconductor (CMOS) analog multiplexers in 8:1 (single ended) and 4:1 (differential) configurations. The devices work well with dual supplies (±5 V to ±22 V), a single supply (8 V to 44 V), or asymmetric supplies (such as V DD = 12 V, V SS = –5 V). The overvoltage protection is available in powered and powered-off conditions, making the TMUX7308F and TMUX7309F devices suitable for applications where power supply sequencing cannot be precisely controlled.

The device blocks fault voltage up to +60 V or –60 V relative to ground in both powered and powered-off conditions. When no power supplies are present, the switch channels remain in the OFF state regardless of switch input conditions and logic control status. Under normal operation conditions, if the analog input signal level on any Sx pin exceeds the supply voltage (V DD or V SS) by a threshold voltage (V T), the channel turns OFF and the Sx pin becomes high impedance. When the fault channel is selected, the drain pin (D or Dx) is pulled to the supply (V DD or V SS) that was exceeded.

The low capacitance, low charge injection, and integrated fault protection enables the TMUX7308F and TMUX7309F devices to be used in front end data acquisition applications where high performance and high robustness are both critical. The devices are available in a standard TSSOP package and smaller WQFN package (ideal if PCB space is limited).

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Technische Dokumentation

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Typ Titel Datum
* Data sheet TMUX730xF ±60-V Fault-Protected, 8:1 and Dual 4:1 Multiplexers with Latch-Up Immunity and 1.8-V Logic datasheet (Rev. C) PDF | HTML 12 Jul 2023
EVM User's guide TMUX73XXF EVM User Guide PDF | HTML 15 Nov 2024
Application brief How to Protect a Multi-Channel RTD System using Fault Protected Multiplexers (Rev. A) PDF | HTML 08 Aug 2024
Application note Protecting and Maintaining Signal Integrity in PLC Systems (Rev. A) PDF | HTML 22 Jul 2024
Application note How to Handle High Voltage Common Mode Applications using Multiplexers PDF | HTML 03 Okt 2022
Product overview PLC Analog Input Front-End Architectures PDF | HTML 31 Jul 2022
Application note Protection Against Overvoltage Events, Miswiring, and Common Mode Voltages PDF | HTML 07 Okt 2021

Design und Entwicklung

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Benutzerhandbuch: PDF | HTML
Evaluierungsplatine

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Schnittstellenadapter

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The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Benutzerhandbuch: PDF
Schnittstellenadapter

LEADLESS-ADAPTER1 — Oberflächenmontierbarer DIP-Header-Adapter zum Testen der 6-, 8-, 10-, 12-, 14-, 16- und 20-poligen

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
Benutzerhandbuch: PDF
Simulationsmodell

TMUX7309F IBIS Model

SCDM282.ZIP (31 KB) - IBIS Model
Simulationsmodell

TMUX7309F PSPICE Model

SCDM306.ZIP (49 KB) - PSpice Model
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
TSSOP (PW) 16 Ultra Librarian
WQFN (RRP) 16 Ultra Librarian

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