SN74AHC1G04

ACTIVO

Inversor único de 2 V a 5.5 V

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Detalles del producto

Technology family AHC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 1 IOL (max) (mA) 8 IOH (max) (mA) -8 Supply current (max) (µA) 10 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AHC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 1 IOL (max) (mA) 8 IOH (max) (mA) -8 Supply current (max) (µA) 10 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-5X3 (DRL) 5 2.56 mm² 1.6 x 1.6 SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Operating range 2 V to 5.5 V
  • Max tpd of 6.5 ns at 5 V
  • Low power consumption, 10-µA max ICC
  • ±8-mA output drive at 5 V
  • Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time
  • Latch-up performance exceeds 250 mA per JESD 17
  • Operating range 2 V to 5.5 V
  • Max tpd of 6.5 ns at 5 V
  • Low power consumption, 10-µA max ICC
  • ±8-mA output drive at 5 V
  • Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time
  • Latch-up performance exceeds 250 mA per JESD 17

The SN74AHC1G04 contains one inverter gate. The device performs the Boolean function Y = A.

The SN74AHC1G04 contains one inverter gate. The device performs the Boolean function Y = A.

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Documentación técnica

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Tipo Título Fecha
* Data sheet SN74AHC1G04 Single Inverter Gate datasheet (Rev. V) PDF | HTML 01 feb 2024
Product overview Configurable Timed Reset Using Discrete Logic (Rev. A) PDF | HTML 02 may 2023
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 jul 2018
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note How to Select Little Logic (Rev. A) 26 jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 jun 2004
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 dic 2002
Application note Texas Instruments Little Logic Application Report 01 nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 feb 2000
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 sep 1999
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 abr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 dic 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 ago 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 jun 1997
Application note Live Insertion 01 oct 1996

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

5-8-LOGIC-EVM — Módulo de evaluación lógica genérico para encapsulados DCK, DCT, DCU, DRL y DBV de 5 a 8 pines

Módulo de evaluación (EVM) flexible diseñado para admitir cualquier dispositivo que tenga un encapsulado DCK, DCT, DCU, DRL o DBV en un recuento de 5 a 8 pines.
Guía del usuario: PDF
Modelo de simulación

SN74AHC1G04 Behavioral SPICE Model

SCLM274.ZIP (7 KB) - PSpice Model
Modelo de simulación

SN74AHC1G04 IBIS Model

SCLM003.ZIP (13 KB) - IBIS Model
Modelo de simulación

SN74AHC1G04 TINA-TI Reference Design

SCLM113.TSC (25 KB) - TINA-TI Reference Design
Modelo de simulación

SN74AHC1G04 TINA-TI Spice Model

SCLM114.ZIP (3 KB) - TINA-TI Spice Model
Modelo de simulación

SN74AHC1G04H IBIS Model

SCLM028.ZIP (6 KB) - IBIS Model
Modelo de simulación

SN74AHC1G04H IBIS Model

SCLM029.ZIP (5 KB) - IBIS Model
Modelo de simulación

SN74AHC1G04H IBIS Model

SCLM030.ZIP (6 KB) - IBIS Model
Modelo de simulación

SN74AHC1G04H IBIS Model

SCLM031.ZIP (5 KB) - IBIS Model
Diseños de referencia

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Esquema: PDF
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Esquema: PDF
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The TIDA-01054 reference design helps eliminate the performance degrading effects of EMI on Data Acquisition (DAQ) systems greater than 16 bits with the help of the LM53635 buck converter. The buck converter enables the designer to place power solutions close to the signal path without the (...)
Design guide: PDF
Esquema: PDF
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As FPGA and ASIC technology advances, the core voltage requirements get lower but the current demand is larger. The newest space grade FPGAs and ASICS require low voltage and high currents for their core power consumption. These high (...)

Design guide: PDF
Esquema: PDF
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The TIDA-01055 reference design for high performance DAQ Systems optimizes the ADC reference buffer to improve SNR performance and reduce power consumption with the TI OPA837 high-speed op amp. This device is used in a composite buffer configuration and provides a 22% power improvement over (...)
Design guide: PDF
Esquema: PDF
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TIDA-01057 — Diseño de referencia que maximiza el rango dinámico de señal para entrada diferencial real de 10 Vpp

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Design guide: PDF
Esquema: PDF
Diseños de referencia

TIDA-01037 — Diseño de referencia de adquisición de datos optimizado para aislador de 1 MSPS de 20 bits, que maxi

TIDA-01037 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design that utilizes two different isolator devices to maximize signal chain SNR and sample rate performance. For signals requiring low jitter, such as ADC sampling clocks, TI’s ISO73xx family of low jitter (...)
Design guide: PDF
Esquema: PDF
Diseños de referencia

TIDA-01051 — Diseño de referencia que optimiza la utilización de FPGA y la producción de datos para equipos de pr

The TIDA-01051 reference design is used to demonstrate optimized channel density, integration, power consumption, clock distribution and signal chain performance of very high channel count data acquisition (DAQ) systems such as those used in automatic test equipment (ATE). Using serializers, such (...)
Design guide: PDF
Esquema: PDF
Diseños de referencia

TIDA-01050 — Diseño de referencia del sistema DAQ de interfaz analógica optimizado para convertidores de datos SA

The TIDA-01050 reference design aims to improve the integration, power consumption, performance, and clocking issues typically associated with automatic test equipment. This design is applicable to any ATE system but most applicable to systems requiring a large number of input channels.
Design guide: PDF
Esquema: PDF
Diseños de referencia

TIDA-01052 — Diseño de referencia de controlador ADC que mejora la THD a escala completa mediante alimentación ne

The TIDA-01052 reference design aims to highlight system performance increases seen using a negative voltage rail on the analog front end driver amplifiers rather than ground. This concept is relative to all analog front ends, however this design is aimed specifically at automatic test equipment.
Design guide: PDF
Esquema: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOT-23 (DBV) 5 Ultra Librarian
SOT-5X3 (DRL) 5 Ultra Librarian
SOT-SC70 (DCK) 5 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

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