SN74BCT2414
- BiCMOS Design Substantially Reduces Standby Current
- Two Independent 2-Line to 4-Line Decoders or One 3-Line to 8-Line Decoder
- Separate Enable Inputs for Easy Cascading
- Two Supply Voltage Terminals (VCC and Vbat)
- Built-In Supply-Voltage Monitor for VCC
- Automatic Cut Off of Outputs During VCC Fail
- Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (N)
The SN74BCT2414 is a decoder specially designed to be used in memory systems with battery backup during power failure. The two independent 2-line to 4-line decoders with separate and common control inputs may be externally cascaded to implement a 3-line to 8-line decoder.
The circuit has two supply voltage inputs: the voltage monitor (bandgap) is powered via the VCC terminal; the internal logic of the circuit is powered via the Vbat terminal. In case VCC drops below 3.65 V (nominal), the voltage monitor forces the voltage-control (VS) and decoder outputs (Y) to the high level. VS may be used to disconnect the supply voltage of the memories (Vbat) from the system supply. This output is switched off when the on-chip supply voltage monitor detects a power failure.
The SN74BCT2414 is characterized for operation from 0°C to 70°C.
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技術資料
| 種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
|---|---|---|---|---|---|---|
| * | データシート | Memory Decoder With On-Chip Supply Voltage Monitor データシート (Rev. B) | 1993年 11月 1日 |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用原材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点