TLV320AIC14

アクティブ

低消費電力、音声帯域 CODEC

製品詳細

Number of ADC channels 1 Number of DAC channels 1 Digital audio interface DSP, SMART TDM Analog inputs 3 Analog outputs 1 Sampling rate (max) (kHz) 26 Rating Catalog ADC SNR (typ) (dB) 84 DAC SNR (typ) (dB) 92 Operating temperature range (°C) -40 to 85
Number of ADC channels 1 Number of DAC channels 1 Digital audio interface DSP, SMART TDM Analog inputs 3 Analog outputs 1 Sampling rate (max) (kHz) 26 Rating Catalog ADC SNR (typ) (dB) 84 DAC SNR (typ) (dB) 92 Operating temperature range (°C) -40 to 85
TSSOP (DBT) 30 49.92 mm² 7.8 x 6.4
  • C54x Software Driver Available
  • 16-Bit Oversampling Sigma-Delta A/D Converter
  • 16-Bit Oversampling Sigma-Delta D/A Converter
  • Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to Be Used as Master Clock
  • Selectable FIR/IIR Filter With Bypassing Option
  • Programmable Sampling Rate up to:
    • Max 26 KSPS With On-Chip IIR/FIR Filter
    • Max 104 KSPS With IIR/FIR Bypassed
  • On-Chip FIR Produced 84-dB SNR for ADC and 91-dB SNR for DAC Over 13-kHz BW
  • External DSPs IIR/FIR for a Final Sampling Rate of 8 Ksps (IIR/FIR Bypassed) Produced 87-dB SNR for ADC and 92-dB SNR for DAC.
  • Smart Time Division Multiplexed Serial Port (SMARTDM)
    • Glueless 4-Wire Interface to DSP
    • Automatic Cascade Detection (ACD) Self-Generates Master/Slave Device Addresses
    • Programming Mode to Allow On-the-Fly Reconfiguration
    • Continuous Data Transfer Mode to Support DSP’s DMA/Autobuffering Mode
    • Turbo Mode to Maximize Bit Clock for Faster Data Transfer and Higher Data Bandwidth
    • Total Number of Time Slots Dynamically Proportional to Number of Codecs in the Cascade to Eliminate Unused Time Slots and Optimize DSP Memory Allocation
    • Allows up to 16 Codecs to Be Connected to a Single Serial Port
  • Host Port
    • 2-Wire Interface
    • Selectable I2C or S2C
  • Differential and Single-Ended Analog Input/Output
  • Built-In Functions:
    • Sidetone
    • Antialiasing Filter (AAF)
    • Programmable Input and Output Gain Control (PGA)
    • Microphone Amplifiers
    • Power Management With Hardware/Software Power-Down Modes 30 uW
  • Separate Software Control for ADC and DAC Power Down
  • Fully Compatible With TI C54x DSP Power Supplies
    • 1.65 V–1.95 V Digital Core Power
    • 2.7 V–3.6 V Digital I/O
    • 2.7 V–3.6 V Analog
  • Power Dissipation (PD) 10 mW at 3 V in Standard Operation
  • Internal Reference Voltage (Vref)
  • 2s Complement Data Format
  • Test Mode Which Includes Digital Loopback and Analog Loopback

SMARTDM is a trademark of Texas Instruments.

NOTE: This product temporarily requires a waiver signed by the customer before orders can be shipped. A product notification sheet is provided in the data sheets. Please send email to shipping-waivers@list.ti.com for details.

  • C54x Software Driver Available
  • 16-Bit Oversampling Sigma-Delta A/D Converter
  • 16-Bit Oversampling Sigma-Delta D/A Converter
  • Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to Be Used as Master Clock
  • Selectable FIR/IIR Filter With Bypassing Option
  • Programmable Sampling Rate up to:
    • Max 26 KSPS With On-Chip IIR/FIR Filter
    • Max 104 KSPS With IIR/FIR Bypassed
  • On-Chip FIR Produced 84-dB SNR for ADC and 91-dB SNR for DAC Over 13-kHz BW
  • External DSPs IIR/FIR for a Final Sampling Rate of 8 Ksps (IIR/FIR Bypassed) Produced 87-dB SNR for ADC and 92-dB SNR for DAC.
  • Smart Time Division Multiplexed Serial Port (SMARTDM)
    • Glueless 4-Wire Interface to DSP
    • Automatic Cascade Detection (ACD) Self-Generates Master/Slave Device Addresses
    • Programming Mode to Allow On-the-Fly Reconfiguration
    • Continuous Data Transfer Mode to Support DSP’s DMA/Autobuffering Mode
    • Turbo Mode to Maximize Bit Clock for Faster Data Transfer and Higher Data Bandwidth
    • Total Number of Time Slots Dynamically Proportional to Number of Codecs in the Cascade to Eliminate Unused Time Slots and Optimize DSP Memory Allocation
    • Allows up to 16 Codecs to Be Connected to a Single Serial Port
  • Host Port
    • 2-Wire Interface
    • Selectable I2C or S2C
  • Differential and Single-Ended Analog Input/Output
  • Built-In Functions:
    • Sidetone
    • Antialiasing Filter (AAF)
    • Programmable Input and Output Gain Control (PGA)
    • Microphone Amplifiers
    • Power Management With Hardware/Software Power-Down Modes 30 uW
  • Separate Software Control for ADC and DAC Power Down
  • Fully Compatible With TI C54x DSP Power Supplies
    • 1.65 V–1.95 V Digital Core Power
    • 2.7 V–3.6 V Digital I/O
    • 2.7 V–3.6 V Analog
  • Power Dissipation (PD) 10 mW at 3 V in Standard Operation
  • Internal Reference Voltage (Vref)
  • 2s Complement Data Format
  • Test Mode Which Includes Digital Loopback and Analog Loopback

SMARTDM is a trademark of Texas Instruments.

NOTE: This product temporarily requires a waiver signed by the customer before orders can be shipped. A product notification sheet is provided in the data sheets. Please send email to shipping-waivers@list.ti.com for details.

The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM™). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontrollers. The SMARTDM supports both continuous data transfer mode and on-the-fly reconfiguration programming mode. SMARTDM maximizes the bandwidth of data transfer between the TLV320AIC14 DSP codec and the DSP. In normal operation, it automatically detects the number of codecs in the serial interface and adjusts the number of time slots to match the number of codecs so that no time slot in the TDM frame is wasted. In the turbo mode, it maintains the same number of time slots but maximizes the bit transferred rate to 25 MHz to give the DSP more bandwidth to process other tasks in the same sampling period. The SMARTDM technology allows up to 16 codecs to share a single 4-wire serial bus.

The TLV320AIC14 also provides a flexible host port. The host port interface is a two-wire serial interface that can be programmed to be either an industrial standard I2C or a simple S2C (start-stop communication protocol).

The TLV320AIC14 also integrates all of the critical functions needed for most voice-band applications including MIC preamp, handset/headset preamps, antialiasing filter (AAF), input/output programmable gain amplifier (PGA), and selectable low-pass IIR/FIR filters.

The TLV320AIC14 implements an extensive power management; including device power-down, independent software control for turning off ADC, DAC, op-amps, and IIR/FIR filter (bypassable) to maximize system power conservation. The TLV320AIC14 consumes only 10 mW at 3 V.

The TLV320AIC14’s low power operation from 2.7 V to 3.6 V for analog and I/O and 1.65 V to 1.95 V for digital core power supplies, along with extensive power management, make it ideal for portable applications including wireless accessories, hands free car kits, VOIP, cable modem, and speech processing. Its low group delay characteristic makes it suitable for single or multichannel active control applications.

The TLV320AIC14 is characterized for commercial operation from 0°C to 70°C and industrial operation from –40°C to 85°C.

The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM™). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontrollers. The SMARTDM supports both continuous data transfer mode and on-the-fly reconfiguration programming mode. SMARTDM maximizes the bandwidth of data transfer between the TLV320AIC14 DSP codec and the DSP. In normal operation, it automatically detects the number of codecs in the serial interface and adjusts the number of time slots to match the number of codecs so that no time slot in the TDM frame is wasted. In the turbo mode, it maintains the same number of time slots but maximizes the bit transferred rate to 25 MHz to give the DSP more bandwidth to process other tasks in the same sampling period. The SMARTDM technology allows up to 16 codecs to share a single 4-wire serial bus.

The TLV320AIC14 also provides a flexible host port. The host port interface is a two-wire serial interface that can be programmed to be either an industrial standard I2C or a simple S2C (start-stop communication protocol).

The TLV320AIC14 also integrates all of the critical functions needed for most voice-band applications including MIC preamp, handset/headset preamps, antialiasing filter (AAF), input/output programmable gain amplifier (PGA), and selectable low-pass IIR/FIR filters.

The TLV320AIC14 implements an extensive power management; including device power-down, independent software control for turning off ADC, DAC, op-amps, and IIR/FIR filter (bypassable) to maximize system power conservation. The TLV320AIC14 consumes only 10 mW at 3 V.

The TLV320AIC14’s low power operation from 2.7 V to 3.6 V for analog and I/O and 1.65 V to 1.95 V for digital core power supplies, along with extensive power management, make it ideal for portable applications including wireless accessories, hands free car kits, VOIP, cable modem, and speech processing. Its low group delay characteristic makes it suitable for single or multichannel active control applications.

The TLV320AIC14 is characterized for commercial operation from 0°C to 70°C and industrial operation from –40°C to 85°C.

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート Low Power CMOS 16-Bit 26-KSPS Codec w/Smart Time Division Multiplexed SMARTDM? データシート (Rev. A) 2002年 5月 5日
* エラッタ TLV320AIC12/13/14/15 Errata 2004年 1月 9日
アプリケーション・ノート Common Sample Rate Selection For TLV320AIC12/13/14/15/20/21/24/25 Codecs 2003年 4月 30日
アプリケーション・ノート Interfacing the TLV320AIC12/13/14/15 Codec to the TMS320C5402? DSP 2002年 10月 24日
ユーザー・ガイド DSP - CODEC Development Platform 2002年 9月 26日
アプリケーション・ノート TLV320AIC12/13/14/15 CODEC Operating Under Stand-Alone Slave Mode 2002年 5月 16日

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