Digital Audio Format: 16-24-bit I²S, Right-Justified, Left-Justified
I²C Bus Controlled
Dual Serial Input Ports
Delay Time: 85 ms/ch at fs = 48 kHz
Delay Resolution: One Sample
Delay Memory Cleared on Power-Up or After Delay Changes
- Eliminates Erroneous Data on Output
3.3 V Operation With 5 V Tolerant I/O and I²C Control
Supports Audio Bit Clock Rates of 32 to 64 fs with fs = 32 kHz-192 kHz
No External Crystal or Oscillator Required
- All Internal Clocks Generated From the Audio Clock
Independent Clocks for Each Audio Input
Surface Mount 4mm × 4mm, 16-pin QFN Package
APPLICATIONS
- High Definition Lip-Sync Delay
- Flat Panel TV Lip-Sync Delay
- Home Theater Rear Channel Effects
- Wireless Speaker Front-Channel Synchronization

Digital Audio Format: 16-24-bit I²S, Right-Justified, Left-Justified
I²C Bus Controlled
Dual Serial Input Ports
Delay Time: 85 ms/ch at fs = 48 kHz
Delay Resolution: One Sample
Delay Memory Cleared on Power-Up or After Delay Changes
- Eliminates Erroneous Data on Output
3.3 V Operation With 5 V Tolerant I/O and I²C Control
Supports Audio Bit Clock Rates of 32 to 64 fs with fs = 32 kHz-192 kHz
No External Crystal or Oscillator Required
- All Internal Clocks Generated From the Audio Clock
Independent Clocks for Each Audio Input
Surface Mount 4mm × 4mm, 16-pin QFN Package
APPLICATIONS
- High Definition Lip-Sync Delay
- Flat Panel TV Lip-Sync Delay
- Home Theater Rear Channel Effects
- Wireless Speaker Front-Channel Synchronization

The TPA5051 accepts two serial audio inputs, buffers the data for a selectable period of time, and outputs the delayed audio data on two serial outputs. One device allows delay of up to 85 ms/ch (fs = 48 kHz) to synchronize the audio stream to the video stream in systems with complex video processing algorithms. If more delay is needed, the devices can be connected in series. Independent clocks can be used for each audio input.

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