제품 상세 정보

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 4 CON (typ) (pF) 8 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 2000 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 4 CON (typ) (pF) 8 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 2000 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 TVSOP (DGV) 14 23.04 mm² 3.6 x 6.4 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5
  • High-Bandwidth Data Path (up to 500 MHz(1))
  • 5-V Tolerant I/Os With Device Powered Up
    or Powered Down
  • Low and Flat ON-State Resistance (ron)
    Characteristics Over Operating Range
    (ron = 3 Ω Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0-V to 5-V Switching With 3.3-V VCC
    • 0-V to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero
    Propagation Delay
  • Low Input and Output Capacitance Minimizes
    Loading and Signal Distortion
    (Cio(OFF) = 4 pF Typ)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot
    Clamp Diodes
  • Low Power Consumption
    (ICC = 0.3 mA Typ)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0-V to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL,
    5-V, or 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications:
    USB Interface, Differential Signal Interface, Bus
    Isolation, Low-Distortion Signal Gating
  • High-Bandwidth Data Path (up to 500 MHz(1))
  • 5-V Tolerant I/Os With Device Powered Up
    or Powered Down
  • Low and Flat ON-State Resistance (ron)
    Characteristics Over Operating Range
    (ron = 3 Ω Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0-V to 5-V Switching With 3.3-V VCC
    • 0-V to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero
    Propagation Delay
  • Low Input and Output Capacitance Minimizes
    Loading and Signal Distortion
    (Cio(OFF) = 4 pF Typ)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot
    Clamp Diodes
  • Low Power Consumption
    (ICC = 0.3 mA Typ)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0-V to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL,
    5-V, or 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications:
    USB Interface, Differential Signal Interface, Bus
    Isolation, Low-Distortion Signal Gating

The SN74CB3Q3125 device is a high-bandwidth FET bus switch that uses a charge pump to elevate the gate voltage of the pass transistor, thus providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The SN74CB3Q3125 device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.

The SN74CB3Q3125 device is a high-bandwidth FET bus switch that uses a charge pump to elevate the gate voltage of the pass transistor, thus providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The SN74CB3Q3125 device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치보다 업그레이드된 기능을 지원하는 드롭인 대체품
TMUX1511 활성 전원 차단 보호 및 1.8V 입력 로직을 지원하는 5V, 1:1(SPST), 4채널 아날로그 스위치 Upgraded 3-GHz bandwidth, 2-Ω RON, and 1.8-V logic support

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
13개 모두 보기
유형 직함 날짜
* Data sheet SN74CB3Q3125 Quadruple FET Bus Switch 2.5-V/3.3-V Low-Voltage, High-Bandwidth Bus Switch datasheet (Rev. C) PDF | HTML 2015/06/29
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022/06/02
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021/12/01
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 2021/11/19
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021/01/06
Selection guide Logic Guide (Rev. AB) 2017/06/12
Technical article Logic gates and switches with Ioff or powered-off protection: empowering you to po PDF | HTML 2016/11/02
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
More literature Digital Bus Switch Selection Guide (Rev. A) 2004/11/10
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note Bus FET Switch Solutions for Live Insertion Applications 2003/02/07

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

HSPICE MODEL OF SN74CB3Q3125

SCEJ199.ZIP (93 KB) - HSpice Model
시뮬레이션 모델

SN74CB3Q3125 IBIS Model (Rev. A)

SCDM067A.ZIP (25 KB) - IBIS Model
레퍼런스 디자인

TIDA-00180 — 위치 인코더 인터페이스를 위한 프로그래머블 출력 전압 및 보호 기능을 갖춘 전원 공급 장치

This reference design implements a universal power supply with programmable output voltage and innovative smart eFuse technology for use in a multi-standard position encoder interface module on an industrial drive. The eFuse provides inrush-current and over-current protection as well as user (...)
Design guide: PDF
회로도: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
SSOP (DBQ) 16 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

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