產品詳細資料

Configuration 16:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 60 CON (typ) (pF) 50 ON-state leakage current (max) (µA) 8 Bandwidth (MHz) 89 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
Configuration 16:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 60 CON (typ) (pF) 50 ON-state leakage current (max) (µA) 8 Bandwidth (MHz) 89 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
SOIC (DW) 24 159.65 mm² 15.5 x 10.3 SSOP (DB) 24 63.96 mm² 8.2 x 7.8
  • Wide analog input voltage range
  • Low ON resistance
    • VCC = 4.5V, 70Ω (typ)
    • VCC = 6V, 60Ω (typ)
  • Fast switching and propagation speeds
  • Break-before-make switching
    • 6ns (typ) at 4.5V
  • Available in both narrow- and wide-body plastic packages
  • Fanout (over-temperature range)
    • Standard outputs: 10 LSTTL loads
    • Bus driver outputs: 15 LSTTL loads
  • Wide operating temperature range: –55°C to +125°C
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LSTTL logic ICs
  • HC types
    • 2V to 6V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT types
    • 4.5V to 5.5V operation
    • Direct LSTTL input logic compatibility, VIL= 0.8V (max), VIH = 2V (min)
    • CMOS input compatibility, Il ≤ 1µA at VOL, VOH
  • Wide analog input voltage range
  • Low ON resistance
    • VCC = 4.5V, 70Ω (typ)
    • VCC = 6V, 60Ω (typ)
  • Fast switching and propagation speeds
  • Break-before-make switching
    • 6ns (typ) at 4.5V
  • Available in both narrow- and wide-body plastic packages
  • Fanout (over-temperature range)
    • Standard outputs: 10 LSTTL loads
    • Bus driver outputs: 15 LSTTL loads
  • Wide operating temperature range: –55°C to +125°C
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LSTTL logic ICs
  • HC types
    • 2V to 6V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT types
    • 4.5V to 5.5V operation
    • Direct LSTTL input logic compatibility, VIL= 0.8V (max), VIH = 2V (min)
    • CMOS input compatibility, Il ≤ 1µA at VOL, VOH

The CD74HC4067 and CD74HCT4067 devices are digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.

These analog multiplexers and demultiplexers control analog voltages that may vary across the voltage supply range. They are bidirectional switches, thus allowing any analog input to be used as an output and vice-versa. The switches have low on resistance and low off leakages. In addition, these devices have an enable control that, when high, disables all switches to their off state.

The CD74HC4067 and CD74HCT4067 devices are digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.

These analog multiplexers and demultiplexers control analog voltages that may vary across the voltage supply range. They are bidirectional switches, thus allowing any analog input to be used as an output and vice-versa. The switches have low on resistance and low off leakages. In addition, these devices have an enable control that, when high, disables all switches to their off state.

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類型 標題 日期
* Data sheet CD74HCx4067 High-Speed CMOS Logic 16-Channel Analog Multiplexer and Demultiplexer datasheet (Rev. D) PDF | HTML 2024年 12月 4日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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TMUXBQB-DYYEVM — 適用於 16 針腳 BQB、DYY 和 PW 封裝的通用 TMUX 評估模組

TMUXBQB-DYYEVM 可讓使用 16 針腳 TSSOP (PW)、WQFN (BQB) 和 SOT-23 THIN (DYY) 封裝的 TMUX 產品線進行快速原型設計,以及 DC 特性分析。

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參考設計

TIDA-060014 — 用於 PLC 的 96 通道雙向數位輸入模組參考設計

This reference design is a compact implementation of 96 isolated digital input channels using the ISO1212, an isolated digital input receiver. This design shows the current limit feature of the ISO1212 device which has better thermal performance than traditional optocoupler solutions. This design (...)
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SOIC (DW) 24 Ultra Librarian
SSOP (DB) 24 Ultra Librarian

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