封裝資訊
| 封裝 | 針腳 USON (DRY) | 6 |
| 操作溫度範圍 (°C) -40 to 85 |
| 包裝數量 | 運送業者 5,000 | LARGE T&R |
SN74AUP2G07 的特色
- Low static-power consumption (ICC = 0.9 µA maximum)
- Low dynamic-power consumption (Cpd = 1 pF typical at 3.3 V)
- Low input capacitance (Ci = 1.5 pF typical)
- Low noise – overshoot and undershoot <10% of VCC
- Ioff supports live insertion, partial-power-down mode, and back-drive protection
- Input hysteresis allows slow input transition and better switching noise immunity at the input (Vhys = 250 mV typical at 3.3 V)
- Wide operating VCC range of 0.8 V to 3.6 V
- Optimized for 3.3 V operation
- 3.6-V I/O tolerant to support mixed-mode signal operation
- tpd = 3.3 ns maximum at 3.3 V
- Suitable for point-to-point applications
- Latch-up performance exceeds 100 mA per JESD 78, Class II
- ESD performance tested per JESD 22
- 4500-V human-body model
- 1500-V charged-device model
SN74AUP2G07 的說明
The SN74AUP2G07 device is a dual buffer gate with open drain output that operates from 0.8 V to 3.6 V.