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整合式與特殊功能資料轉換器
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VSP5324-Q1

現行

車用雙通道 4 通道 12 位元 80MSPS 類比轉數位轉換器 (ADC)

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產品規格表

VSP5324-Q1

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 12 Number of channels 4 Sample rate (Msps) 80 Gain (min) (dB) 0 Gain (max) (dB) 12 Pd (typ) (mW) 2.2 Supply voltage (max) (V) 2.2 Operating temperature range (°C) -40 to 105 Output data format LVDS Rating Automotive
Resolution (Bits) 12 Number of channels 4 Sample rate (Msps) 80 Gain (min) (dB) 0 Gain (max) (dB) 12 Pd (typ) (mW) 2.2 Supply voltage (max) (V) 2.2 Operating temperature range (°C) -40 to 105 Output data format LVDS Rating Automotive
VQFN (RGC) 64 81 mm² 9 x 9
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results
    • Device Temperature Grade 2: –40°C to +105°C
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Designed for Low Power:
    • One-Lane Interface:
      65 mW per Channel at 50 MSPS
    • Two-Lane Interface:
      82 mW per Channel at 80 MSPS
  • Dynamic Performance:
    • 5-MHz Input Frequency, 80 MSPS
    • SNR: 70 dBFS
    • SFDR: 85 dBc
  • Serial LVDS ADC Data Outputs
  • Variety of LVDS Test Patterns to Verify Data Capture
  • Package: 9-mm × 9-mm VQFN-64
  • Operating Temperature: –40°C to +105°C
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results
    • Device Temperature Grade 2: –40°C to +105°C
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Designed for Low Power:
    • One-Lane Interface:
      65 mW per Channel at 50 MSPS
    • Two-Lane Interface:
      82 mW per Channel at 80 MSPS
  • Dynamic Performance:
    • 5-MHz Input Frequency, 80 MSPS
    • SNR: 70 dBFS
    • SFDR: 85 dBc
  • Serial LVDS ADC Data Outputs
  • Variety of LVDS Test Patterns to Verify Data Capture
  • Package: 9-mm × 9-mm VQFN-64
  • Operating Temperature: –40°C to +105°C

The VSP5324-Q1 device is a low-power, 12-bit, 80-MSPS, quad-channel, analog-to-digital converter (ADC). Low-power consumption and multiple-channel integration in a compact package makes the device attractive for 3D time-of-flight (ToF) systems.

Serial low-voltage differential signaling (LVDS) outputs reduce the number of interface lines and enable high system integration.

The device is available in a compact 9-mm × 9-mm VQFN-64 Package.

The VSP5324-Q1 device is a low-power, 12-bit, 80-MSPS, quad-channel, analog-to-digital converter (ADC). Low-power consumption and multiple-channel integration in a compact package makes the device attractive for 3D time-of-flight (ToF) systems.

Serial low-voltage differential signaling (LVDS) outputs reduce the number of interface lines and enable high system integration.

The device is available in a compact 9-mm × 9-mm VQFN-64 Package.
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類型 標題 日期
* Data sheet VSP5324-Q1 4-Channel, 12-Bit, 80-MSPS ADC datasheet (Rev. A) PDF | HTML 2017年 12月 19日
White paper Introduction to Time-of-Flight Camera (Rev. B) 2014年 5月 7日

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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