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Systems of the Future, Today

How long would it take to create a fresh design taking advantage of the 125 million transistors available with TImeline technology?

TI�s TImeline Technology promises to slash product development cycles. Designers will be able to select microprocessor or customizable digital signal processor (cDSPtm) cores and surround them with other needed modules without great concern about exceeding the chip's capacity.

125 million transistors on a single chip also opens the door to powerful new combinations of processors. TI already takes this multi-processor approach in some products. For example, the TMS320C80 DSP combines four DSPs and a RISC controller into a device capable of 2 billion operations per second, the most powerful DSP on the market. With TImeline technology, arrays of DSPs on one chip could deliver several times as much performance. And performance barriers inherent in current designs can be overcome quickly with the 125-million transistor density of TImeline. DSPs today are limited to about 50 and 100 million instructions per second (MIPS) because they must communicate with memory located on separate microchips. The TImeline platform permits combinations of DSPs and SRAM on the same chip for much faster communication, hence, significantly more MIPS.