In modern radar and electronic warfare (EW) systems, active electronically-scanned array (AESA) antenna systems are often used with high speed multi-channel RF transceivers. These systems require very low noise clocking capable of precise channel-to-channel skew adjustment to achieve the optimal system performance like signal-to-noise ratio (SNR), spurious-free dynamic range (SFDR), IMD3 and effective number of bits (ENOB). This reference design demonstrates LMX2820- and LMK04832-based low-noise JESD204B-compliant clocks and provide to multiple AFE7950s up to X-band operation and synchronized them < 10 ps with improved system performance at 9-GSPS/3-GSPS DAC/ADC clocks.
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Reference design overview and verified performance test data
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Detailed overview of design layout for component placement
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Design guide | Multichannel RF Transceiver Low-Noise Clocking Ref. Des. for Radar and EW Applic | PDF | HTML | Dec. 16, 2021 |
| Application note | LMX2820 RF Synthesizer Phase Noise Improvement With Alternative Topologies (Rev. A) | PDF | HTML | May 22, 2023 | |
| Application note | Combining Two LMX2820 Synthesizer Outputs for Improved Phase Noise (Rev. A) | PDF | HTML | Mar. 03, 2022 |
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