JAJSF94F July   2015  – May 2018 SN65DP159 , SN75DP159

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      DP159マザーボード・アプリケーションの構造
      2.      DP159ドングル・アプリケーションの構造
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Supply Electrical Characteristics
    6. 7.6  Differential Input Electrical Characteristics
    7. 7.7  HDMI and DVI TMDS Output Electrical Characteristics
    8. 7.8  AUX, DDC, and I2C Electrical Characteristics
    9. 7.9  HPD Electrical Characteristics
    10. 7.10 HDMI and DVI Main Link Switching Characteristics
    11. 7.11 AUX Switching Characteristics (Only for RGZ Package)
    12. 7.12 HPD Switching Characteristics
    13. 7.13 DDC and I2C Switching Characteristics
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Reset Implementation
      2. 9.3.2 Operation Timing
      3. 9.3.3 I2C-over-AUX to DDC Bridge (SNx5DP159 48-Pin Package Version Only)
      4. 9.3.4 Input Lane Swap and Polarity Working
      5. 9.3.5 Main Link Inputs
      6. 9.3.6 Main Link Inputs Debug Tools
      7. 9.3.7 Receiver Equalizer
      8. 9.3.8 Termination Impedance Control
      9. 9.3.9 TMDS Outputs
        1. 9.3.9.1 Pre-Emphasis/De-Emphasis
    4. 9.4 Device Functional Modes
      1. 9.4.1 Retimer Mode
      2. 9.4.2 Redriver Mode
      3. 9.4.3 DDC Training for HDMI2.0 Data Rate Monitor
      4. 9.4.4 DDC Functional Description
    5. 9.5 Register Maps
      1. 9.5.1 DP-HDMI Adaptor ID Buffer
      2. 9.5.2 Local I2C Interface Overview
      3. 9.5.3 I2C Control Behavior
      4. 9.5.4 I2C Control and Status Registers
        1. 9.5.4.1 Bit Access Tag Conventions
        2. 9.5.4.2 CSR Bit Field Definitions
          1. 9.5.4.2.1 ID Registers
          2. 9.5.4.2.2 Misc Control
          3. 9.5.4.2.3 HDMI Control
          4. 9.5.4.2.4 Equalization Control Register
          5. 9.5.4.2.5 EyeScan Control Register
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Use Case of SNx5DP159
      2. 10.1.2 DDC Pullup Resistors
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
    3. 10.3 System Example
      1. 10.3.1 Compliance Testing
  11. 11Power Supply Recommendations
    1. 11.1 Power Management
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
    3. 12.3 Thermal Considerations
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 関連リンク
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

4 改訂履歴

Changes from E Revision (April 2018) to F Revision

  • 「概要(続き)」で「SN75DP159は-40℃～85℃で動作が規定されています」を「SN65DP159は-40℃～85℃で動作が規定されています」に変更Go
  • 「概要(続き)」で「SN65DP159は0℃～85℃で動作が規定されています」を「SN75DP159は0℃～85℃で動作が規定されています」に変更Go

Changes from D Revision (June 2017) to E Revision

  • Changed the pinout images appearance in the Pin Configuration and Functions sectionGo

Changes from C Revision (July 2016) to D Revision

  • タイトルを「SNx5DP159 6Gbps、DP++からHDMI™へのリタイマ」から「SNx5DP159 6Gbps、AC結合、TMDS™からHDMI™へのレベル・シフタ・リタイマ」に変更Go
  • 「特長」の一覧を変更Go
  • 「アプリケーション」の一覧を変更Go
  • VSADJ: Added Note: "Best transmit eye ..", added MIN and MAx values in the Recommended Operating Conditions table Go
  • Changed the description of td1 in Table 1Go
  • Changed read procedures in the I2C Control Behavior sectionGo
  • Added paragraph: "DP159 is designed..." to the Application and Implementation sectionGo
  • Added 2 paragraphs to the Application Information sectionGo
  • Added line item "Adding pre-emphasis will improve..." to the Detailed Design Procedure sectionGo

Changes from B Revision (Arpil 2016) to C Revision

Changes from A Revision (July 2015) to B Revision

Changes from * Revision (July 2015) to A Revision

  • デバイスのステータスを「製品プレビュー」から「量産データ」に更新Go
  • 標準的な消費電力の数値を更新Go
  • スタンバイ時消費電力を削除Go
  • 「プレビュー」から「量産データ」に変更Go
  • Replaced SIG_EN with NC in pinout drawing and Pin Functions tableGo
  • Removed lane swap from description of SWAP/POL = H Go
  • Updated swing data Go
  • Changed DDC link into its pin names between SNK and SRC and updated min value Go
  • Added new line for SCL_SNK, SDA_SNKGo
  • Removed standby power and standby current rows and updated active power and current numbers Go
  • Changed term control to no source termination Go
  • Increased ILEAK max value from 10 µA to 45 µAGo
  • Updated redriver mode max jitter value Go
  • Clarified polarity swap to input signals Go
  • Added more information on compliance in redriver mode Go
  • Added note to DDC Functional Description section describing DDC snoop function Go
  • Removed bit 4 SIG_EN and made reserved Go
  • Removed SIG_EN Pin and added Note 1 for DDC Snoop Go
  • Updated schematic to replace SIG_EN pin with NC Go
  • Updated VID swing Go
  • Changed Title to better match table. Removed Standby and redundant rowsGo
  • Updated drawing with pin 17 changed to NC Go