JAJSHF0 データシート

JAJSHF0B February 2019 – November 2019 BQ25887

PRODUCTION DATA.

Default I²C Slave Address: 0x6B (1101 011B + R/W)

Address	Access Type	Acronym	Register Name	Section
00h	R/W	REG00	Cell Voltage Limit	Go
01h	R/W	REG01	Charge Current Limit	Go
02h	R/W	REG02	Input Voltage Limit	Go
03h	R/W	REG03	Input Current Limit	Go
04h	R/W	REG04	Precharge and Termination Control	Go
05h	R/W	REG05	Charger Control 1	Go
06h	R/W	REG06	Charger Control 2	Go
07h	R/W	REG07	Charger Control 3	Go
08h	R/W	REG08	Charger Control 4	Go
09h	R/W	REG09	Reserved	Go
0Ah	R	REG0A	ICO Current Limit	Go
0Bh	R	REG0B	Charger Status 1	Go
0Ch	R	REG0C	Charger Status 2	Go
0Dh	R	REG0D	NTC Status	Go
0Eh	R	REG0E	FAULT Status	Go
0Fh	R	REG0F	Charger Flag 1	Go
10h	R	REG10	Charger Flag 2	Go
11h	R	REG11	Fault Flag	Go
12h	R/W	REG12	Charger Mask 1	Go
13h	R/W	REG13	Charger Mask 2	Go
14h	R/W	REG14	Fault Mask	Go
15h	R/W	REG15	ADC Control	Go
16h	R/W	REG16	ADC Function Disable	Go
17h	R	REG17	IBUS ADC1	Go
18h	R	REG18	IBUS ADC0	Go
19h	R	REG19	ICHG ADC1	Go
1Ah	R	REG1A	ICHG ADC0	Go
1Bh	R	REG1B	VBUS ADC1	Go
1Ch	R	REG1C	VBUS ADC0	Go
1Dh	R	REG1D	VBAT ADC1	Go
1Eh	R	REG1E	VBAT ADC0	Go
1Fh	R	REG1F	VCELLTOP ADC1	Go
20h	R	REG20	VCELLTOP ADC0	Go
21h	R	REG21	TS ADC1	Go
22h	R	REG22	TS ADC0	Go
23h	R	REG23	TDIE ADC1	Go
24h	R	REG24	TDIE ADC0	Go
25h	R/W	REG25	Part Information	Go
26h	R	REG26	VCELLBOT ADC1	Go
27h	R	REG27	VCELLBOT ADC0	Go
28h	R/W	REG28	Cell Balancing Control 1	Go
29h	R/W	REG29	Cell Balancing Control 2	Go
2Ah	R/W	REG2A	Cell Balancing Status and Control	Go
2Bh	R	REG2B	Cell Balancing Flag	Go
2Ch	R/W	REG2C	Cell Balancing Mask	Go

Complex bit access types are encoded to fit into small table cells. Table 7 shows the codes that are used for access types in this section.