Internally, the modes of operation are categorized
as the following:
Auto Mode of Operation: Based on the CLK_SRC_SEL configuration B0_P0_R52[3:1], the
mode can be further divided as follows:
- Auto Primary BCLK Ratio Mode
(3’d0) – Primary ASI BCLK is selected to be the audio source clock by the
user.
- Auto Secondary BCLK Ratio Mode
(3’d2) – Secondary ASI BCLK is selected to be the audio source clock by the
user.
- Auto MCLK Ratio Mode (3’d1 or
3’d3) – MCLK supplied at the input Pad to be user as audio source, Frequency
of MCLK is Integer multiple of Fsync frequency.
- Auto MCLK Fixed Mode (3’d4) –
MCLK supplied at the input Pad to be user as audio source, MCLK frequency has no
integral relation with the Fsync frequency (PLL use is mandatory).
- Custom Mode of Operation
CUSTOM_CLK_CFG register to 1’b1 (B0_P0_R50[0]). User Configures all the Dividers
manually in this mode.
- Semi-Automatic mode: This is
used to detect Non-audio timings automatically.