SPRAD14 April 2022 AM67 , AM67A , AM68 , AM68A , AM69 , AM69A , DRA821U , DRA821U-Q1 , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4AEN-Q1 , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VE-Q1 , TDA4VEN-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VM , TDA4VM-Q1 , TDA4VP-Q1 , TDA4VPE-Q1
All trademarks are the property of their respective owners.
Jacinto TDA4x processors family is a scalable platform with software-compatible products. Based on systems requirements, TDA4x SoC family offers multiple products with different performance, power and feature-set that customers can choose from. Currently, the TDA4VM is production and details can be found at TDA4VM product page [1]. Table 1-1 shows a typical IP configuration of TDA4VM. For more information, see the DRA829/TDA4VM Technical Reference Manual [2].
Processor/Accelerator | Interface | |||||||||
---|---|---|---|---|---|---|---|---|---|---|
TDA4VM | IP | Arm | Arm-R5F | DSP | GPU | MMA | DDR | Capture | PCIe | Ethernet |
Feature | 2xA72 (~25K DMIPS) |
3xDual R5F (3x ~12KDMIPS) |
1xC7x+ 2xC66x |
GE8430 (100 GFLOPs) |
1xMMAv1 8TOPs | 1x32b@4266Mhz | 2x CSI-Rx (4L) | PCIe Gen3: 4x 2DL | 8pswitch+ 1x RGMII (MCU) |
Dual-TDA4x cascading solution may be required in below scenarios:
All the Jacinto TDA4VM SoCs are configured with Ethernet and PCIe interfaces. This means that all the TDA4x family processors can be interconnected via Ethernet and PCIe to enable dual-SoC system requirements. Next sections will discuss system considerations for such solution.
An example highly integrated ADAS system based on dual TDA4VM SoCs is shown in Figure 1. This ADAS system integrates front-camera, 4 surround view cameras and 4 side view cameras on a single PCB and supports below main features:
Dual-TDA4x based system can enable system cost savings by taking advantage of TDA4x SoC features. TDA4X SoC integrates many critical processors and IPs required for an ADAS system including image signal processing (ISP), MCU/safety island for ASIL-D safety support, Ethernet switch and so on. Such integration minimizes required external components. For TDA4, PMIC, DDR, flash memory for boot and storage are the main required external peripheral devices. In addition, there can be further cost savings for dual-SoC solution including:
The external storage and flash memory including DDR, EMMC and flash.
However, the final decision on system BOM is based on system requirements to optimize the best performance and the system cost.
Generally, side view cameras and surround view cameras are connected and processed on two TDA4x SoCs . However, the front camera typically needs to implement more L2, L2+ functions such as Object Detection, Semantic Segmentation, Lane Keeping/Changing Assist and so on. When the computing power of one TDA4x SoC cannot support such multi-functional implementation, then front camera input needs to be routed to the second TDA4x SoCs for additional processing. This section introduces two methods to connect front camera to TDA4x SoCs.
This solution duplicates the camera source data to two TDA4x SoCs, (TDA4-A, TDA4-B) each TDA4x processor implements different ADAS functions. A reference implementation to distribute front camera functionality, as shown in Figure 3-1.
Camera in Primary TDA4-A:
Camera in Secondary TDA4-B:
Fusion: