SPRAD14 April   2022 AM67 , AM67A , AM68 , AM68A , AM69 , AM69A , DRA821U , DRA821U-Q1 , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4AEN-Q1 , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4VE-Q1 , TDA4VEN-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VM , TDA4VM-Q1 , TDA4VP-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Dual TDA4 System
    1. 2.1 Dual TDA4x SoC System Diagram
    2. 2.2 System Consideration and BOM Optimization
  4. 3Camera Connection
    1. 3.1 Duplicate Front Camera Input to Two TDA4x SoCs
    2. 3.2 Connect Front Camera to Only one TDA4x
  5. 4Boot Sequence Solution
    1. 4.1 Boot Solution Based on Dual Flash
    2. 4.2 Boot Solution Based on Single Flash
  6. 5Multi-SoC Demo Based on PCIe
  7. 6References

Boot Solution Based on Dual Flash

In this case, both the dual TDA4x SoCs have their own flash for system boot. Figure 4-1 shows the boot sequence of dual TDA4x. The advantage of this boot sequence solution is that the two TDA4x SoCs are booted in parallel, which can shorten the start-up time of the whole dual TDA4x system.

Figure 4-1 Boot Flow With Second Flash

Key features and process as below:

  • The primary and secondary TDA4 should be using the OSPI/QSPI boot mode.
  • The boot images are stored in OSPI (for primary TDA4x) or QSPI (for secondary TDA4x) to achieve faster boot times. In addition, system images of MCU2_x/MCU3_x cores can also be stored in flash storage, which can further shorten the start-up time.
  • Primary TDA4x SoC needs to initialize and configure some hardware interfaces, such as Ethernet, and PCIe. These hardware configurations needs to take care of subsequent transmission of images to secondary TDA4x SoC.
  • Primary TDA4x SoC continues its boot flow to wakeup other cores after transferring secondary TDA4x’s images. Secondary TDA4x SoC boots from its QSPI first, then boots other cores after receiving images from primary TDA4x SoC.
  • Primary TDA4x SoC continues its boot flow to wakeup other cores after transferring secondary TDA4x’s images. Secondary TDA4x SoC will boot from its QSPI first, then boot other cores after receiving images from primary TDA4x SoC.