SWRU455M February 2017 – October 2020 CC3120 , CC3120MOD , CC3130 , CC3135 , CC3135MOD , CC3220MOD , CC3220MODA , CC3220R , CC3220S , CC3220SF , CC3230S , CC3230SF , CC3235MODAS , CC3235MODASF , CC3235MODS , CC3235MODSF , CC3235S , CC3235SF
The SimpleLink Wi-Fi device runs as a SPI slave and supports a 4-wire SPI interface. Table 4-2 lists the required SPI settings.
Attribute | Value |
---|---|
Clock rate | Up to 20 MHz |
Word length | 8-bit, 16-bit, 32-bit |
Mode | 0 (CPOL=0, CPHA=0) |
Other | CS required, and cannot be tied to active state
Additional IRQ line required for indicating asynchronous events from the device |
In SPI, all communications on the bus are initiated by the SPI master (the host in this case). There is always a single master on the bus. To allow the SimpleLink Wi-Fi device to trigger asynchronous events to the host, an additional I/O must be connected (H.IRQ) between them. This line triggers the host to read a message from the device.
Figure 4-1 shows a typical host setup of the CC31xx wireless network processor using SPI interface.
For more details about the SPI interface, refer to Section D.