SBAA541 December 2022 AMC1202 , AMC1302 , AMC1306M05 , AMC22C11 , AMC22C12 , AMC23C10 , AMC23C11 , AMC23C12 , AMC23C14 , AMC23C15 , AMC3302 , AMC3306M05
Figure 1-2 shows the equivalent model of a real current sensor with offset. In this study, the current-sensor offset is modeled as a fixed-value normalized to the full scale of the measurement, see Equation 8.
where
The goal of the current control loops of the AC/DC stage is to keep the currents detected by the MCU under control without determining the real currents in the system. If the measurement does not match the actual current due to an offset error, the current causes an undesired power disturbance in the system as is expressed with Equation 9.
where
The power disturbance is not a function of the power conversion between the AC and DC stage, as opposed to the gain error case; therefore, the issue is always present for any operating condition. This reflects by always having voltage ripple in the DC link. The offset introduces a power disturbance in the system with a frequency equivalent to the line frequency of the grid. As mentioned in the gain error chapter, the DC bus voltage loop is not able to fully reject the power ripple coming out from the sensing point. For this reason control loop versus current-sensing performance must be simulated. Simulations were run for the following use-case and assumptions:
Figure 2-16 shows the simulation results of a AC/DC converter working with different current sensing and with different offset errors.
Observe the presence of a 50-Hz ripple voltage on the DC-link, caused by the power ripple injected by the current sensing stage with an offset. Additionally, the mean value of the voltage in all the cases is still the same when steady state is reached thanks to the integrative part of the PI controller.
The important correlation between the DC link voltage ripple and voltage control bandwidth is evident. If the bandwidth of the voltage control loop is high enough, the control loop tries to eliminate the ripple voltage by quickly controlling the current loops at the expense of the THD toward the grid. In fact, with a bandwidth of the control equal to 400 Hz, an offset of 1.4% offset error, leads to an increment of 10% of the THD (from 3% to 3.3%). Conversely, when the bandwidth of the voltage loop is not high, fluctuation in the DC link is very high because voltage loop is not trying to reject this variation, but this time not injecting any more harmonics in the grid. However, remember that having a voltage ripple in the DC-link can lead to power ripple on the battery which cannot be tolerated. Furthermore, if the voltage bandwidth is significantly reduced, the performance of the step load response becomes quite poor.
In conclusion, a current sensor located in the switching node with an offset error of 1.4% can lead to an increment of the grid current THD of more than 10%.