SLAAE56A November   2022  – March 2023 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   Abstract
  2.   Trademarks
  3. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of STM32 MCUs to MSPM0 MCUs
  4. 2Ecosystem and Migration
    1. 2.1 Software Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 CubeIDE vs Code Composer Studio IDE (CCS)
      3. 2.1.3 CubeMX vs SysConfig
    2. 2.2 Hardware Ecosystem
    3. 2.3 Debug Tools
    4. 2.4 Migration Process
    5. 2.5 Migration and Porting Example
  5. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash Features
      2. 3.2.2 Flash Organization
      3. 3.2.3 Embedded SRAM
    3. 3.3 Power Up and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
    6. 3.6 Interrupt and Events Comparison
    7. 3.7 Debug and Programming Comparison
  6. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 I2C
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
    7. 4.7 Real-Time Clock (RTC)
  7. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Digital-to-Analog Converter (DAC)
    4. 5.4 Operational Amplifier (OPA)
    5. 5.5 Voltage References (VREF)
  8. 6Revision History

3.5 MSPM0 Operating Modes Summary and Comparison

MSPM0 MCUs provide five main operating modes (power modes) to allow for optimization of the device power consumption based on application requirements. In order of decreasing power, the modes are: RUN, SLEEP, STOP, STANDBY, and SHUTDOWN. The CPU is active executing code in RUN mode. Peripheral interrupt events can wake the device from SLEEP, STOP, or STANDBY mode to the RUN mode. SHUTDOWN mode completely disables the internal core regulator to minimize power consumption, and wake is only possible via NRST, SWD, or a logic level match on certain IOs. RUN, SLEEP, STOP, and STANDBY modes also include several configurable policy options (for example, RUN.x) for balancing performance with power consumption.

To further balance performance and power consumption, MSPM0 devices implement two power domains: PD1 (for the CPU, memories, and high performance peripherals), and PD0 (for low speed, low power peripherals). PD1 is always powered in RUN and SLEEP modes, but is disabled in all other modes. PD0 is always powered in RUN, SLEEP, STOP, and STANDBY modes. PD1 and PD0 are both disabled in SHUTDOWN mode.

Operating Modes Comparison

STM32G0 devices have similar operating modes. The table below gives a brief comparison between STM32G0 and MSPM0 devices.

Table 3-9 Operating Modes Comparison Between STM32G0 and MSPM0 Devices
STM32G0MSPM0
ModeDescriptionModeDescription
RunFull clocking and peripherals availableRun0Full clocking and peripherals available
LP RUNCPU limited to 2 MHz1SYSOSC at set frequency; CPUCLK and MCLK limit to 32 kHz
2SYSOSC disabled; CPUCLK and MCLK limit to 32 kHz
SleepCPU not clockedSleep0CPU not clocked
LP SleepSame as LP RUN; but CPU not clocked1Same as Run1, but CPU not clocked
2Same as Run2, but CPU not clocked
Stop0VCORE domain clocks disabledStop0Sleep 0 + PD1 disabled
1Sleep 1 + SYSOSC gear shifted to 4 MHz
1Stop 0 + main power regulator off2Sleep 2 + ULPCLK limited to 32 kHz
StandbyLowest power with BOR capability; RTC available; register settings lost.Standby0Lowest power with BOR capability; all PD0 peripherals can receive ULPCLK and LFCLK at 32 kHz; RTC available with RTCCLK
1Only TIMG0 and TIMG1 can receive ULPCLK or LFCLK at 32 kHz; RTC available with RTCCLK
ShutdownNo clocks or BOR. Core regulation off. RTC domain can still be active. Exit triggers Reset.ShutdownNo clocks, BOR, or RTC. Core regulation off. PD1 And PD0 disabled. Exit triggers reset level BOR.

MSPM0 Capabilities in Lower Power Modes

As seen in #GUID-413C7E46-0876-4583-AE29-8A36243D8ABA/GUID-1B9D55F6-6DC1-4B9B-8731-B0370F6C5FA1, MSPM0 peripherals or peripheral modes can be limited in availability or operating speed in lower power operating modes. For specific details, see the "Supported Functionality by Operating Mode" table found in the MSPM0 device-specific data sheet, for example:

MSPM0G350x Mixed-Signal Microcontrollers data sheet

MSPM0L134x, MSPM0L130x Mixed-Signal Microcontrollers data sheet

An additional capability of the MSPM0 devices is the ability for some peripherals to perform an Asynchronous Fast Clock Request. This allows MSPM0 device to be in a lower power mode where a peripheral is not active, but still allow a peripheral to be triggered or activated. When an Asynchronous Fast Clock Request happens, the MSPM0 device has the ability to quickly ramp up an internal oscillator to a higher speed and/or temporarily go into a higher operating mode to process the impending action. This allows for fast wake up of the CPU from timers, comparator, GPIO, and RTC; receive SPI, UART, and I2C; or trigger DMA transfers and ADC conversions, while sleeping in the lowest power modes. For specific details on implementation of Asynchronous Clock Requests as well as peripheral support and purpose, see the appropriate chapter in the MSPM0 TRMs.

MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual

MSPM0 L-Series 32-MHz Microcontrollers Technical Reference Manual

Entering Lower-Power Modes

Like STM32G0 devices, the MSPM0 devices go into a lower-power mode when executing the wait for event, __WFE();, or wait for interrupt, __WFI();, instruction. The low-power mode is determined by the current power policy settings. The device power policy is set by a driver library function. The following function call sets that power policy to Standby 0.

DL_SYSCTL_setPowerPolicySTANDBY0();

STANDBY0 can be replaced with the operating mode of choice. For a full list of driverlib APIs that govern power policy, see this section of the MSPM0 SDK DriverLib API guide. Also see the following code examples that demonstrate entering different operating modes. Similar examples are available for every MSPM0 device.

Low-power mode code examples

Navigate to the SDK installation and find low-power mode code examples in examples > nortos > LP name > driverlib