SLAAE56A November   2022  – March 2023 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   Abstract
  2.   Trademarks
  3. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of STM32 MCUs to MSPM0 MCUs
  4. 2Ecosystem and Migration
    1. 2.1 Software Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 CubeIDE vs Code Composer Studio IDE (CCS)
      3. 2.1.3 CubeMX vs SysConfig
    2. 2.2 Hardware Ecosystem
    3. 2.3 Debug Tools
    4. 2.4 Migration Process
    5. 2.5 Migration and Porting Example
  5. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash Features
      2. 3.2.2 Flash Organization
      3. 3.2.3 Embedded SRAM
    3. 3.3 Power Up and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
    6. 3.6 Interrupt and Events Comparison
    7. 3.7 Debug and Programming Comparison
  6. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 I2C
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
    7. 4.7 Real-Time Clock (RTC)
  7. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Digital-to-Analog Converter (DAC)
    4. 5.4 Operational Amplifier (OPA)
    5. 5.5 Voltage References (VREF)
  8. 6Revision History

3.2.1 Flash Features

The MSPM0 and STM32G0 family of MCUs feature nonvolatile flash memory used for storing executable program code and application data.

Table 3-2 Comparison of Flash Feature
Features STM32G0 MSPM0
Flash memory

STM32G0B1xx, G0C1xx (up to 512KB)

STM32G071xx, G081xx (up to 128KB)

STM32G031xx, G041xx, G051xx, G061xx (up to 64KB)

MSPM0Gx x ranges 128KB to 32KB

MSPM0Lxx ranges 64KB to 8KB
Memory organization

1 bank – devices up to 128KB

2 banks – devices with >128KB

1 bank – devices up to 256KB

2 banks – devices with >256KB
Flash wait states

0 (HCLK ≤ 24 MHz)

1 (HCLK ≤ 48 MHz)

2 (HCLK ≤ 64 MHz)

0 (MCLK, CPUCLK ≤ 24 MHz)

1 (MCLK, CPUCLK ≤ 48 MHz)

2 (MCLK, CPUCLK ≤ 80 MHz)
Flash word size 64 bits plus 8 ECC bits Same
Programming resolution Single word size Single word, 32-, 16-, or 8-bit (byte)
Multi-word programming 32 words (256 bytes) 2, 4, or 8 words (up to 64 bytes)
Erase

Page size = 2KB

Bank erase (single bank)

Mass erase (all banks)

Sector size = 1KB

Bank erase (up to 256KB)
Write protection Yes (2 write protection areas per bank) Yes, static and dynamic
Read protection Yes Yes
Flash memory read operations 64-bit flash word size plus 8 ECC bits Same – if optional ECC is present
Flash memory write operations 64-bit flash word size plus 8 ECC bits Same – if optional ECC is present
Error code correction (ECC) 8 bits for 64 bits Same
Securable memory area Yes, main memory No
Info memory Yes Yes (NONMAIN)
OTP data region 1KB No
Prefetch Yes Yes
CPU instruction cache

Two 64-bit cache lines (16 bytes)

4x 32-bit instructions or

8x 16-bit instructions

Four 64-bit cache lines (32 bytes) 8x 32-bit instructions or

16x 16-bit instructions

In addition to the flash memory features listed in the previous table, the MSPM0 flash memory also has the following features:

  • In-circuit program and erase supported across the entire supply voltage range
  • Internal programming voltage generation
  • Support for EEPROM emulation with up to 100 000 program/erase cycles on the lower 32KB of the flash memory, with up to 10 000 program/erase cycles on the remaining flash memory (devices with 32KB support 100 000 cycles on the entire flash memory)