SLVAFX0 October   2024 TLV702 , TLV703 , TLV755P , TPS74401 , TPS7A13 , TPS7A14 , TPS7A20 , TPS7A21 , TPS7A49 , TPS7A52 , TPS7A53 , TPS7A53B , TPS7A54 , TPS7A57 , TPS7A74 , TPS7A83A , TPS7A84A , TPS7A85A , TPS7A91 , TPS7A92 , TPS7A94 , TPS7A96 , TPS7H1111-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction to linear regulator turn-on time
  5. 2What impacts the LDO rise time?
    1. 2.1 Simple Use Cases
      1. 2.1.1 Case 1: LDO with an NR filter but without CFF capacitance
      2. 2.1.2 Case 2: NR filter with a CFF capacitance
      3. 2.1.3 Fast-charge circuitry
      4. 2.1.4 Non-ideal LDO behavior
        1. 2.1.4.1 Applied voltage bias
        2. 2.1.4.2 Fast charge current tolerance
        3. 2.1.4.3 Internal error amplifier offset voltage
        4. 2.1.4.4 Temperature impacts the fast-charge current source
        5. 2.1.4.5 Error amplifier common mode voltage
        6. 2.1.4.6 Reference voltage (VREF) ramp time dominates the turn-on time
        7. 2.1.4.7 Start-up during dropout mode
        8. 2.1.4.8 Large values of COUT induce internal current limit
        9. 2.1.4.9 Limitations of large-signal LDO bandwidth
    2. 2.2 Specific Use Cases and Examples
      1. 2.2.1 Case 3: Precision voltage reference with RNR/SS and parallel IFC fast charge
      2. 2.2.2 Case 4: Precision voltage reference with IFC fast charge and no RNR/SS
      3. 2.2.3 Case 5: Precision current reference
      4. 2.2.4 Case 6: Soft-start timing
  6. 3System Considerations
    1. 3.1 Inrush current calculation
    2. 3.2 Inrush current analysis
    3. 3.3 Maximum slew rate
  7. 4LDO regulators referenced in this paper
  8. 5Conclusion
  9. 6References

2.2.4 Case 6: Soft-start timing

Some LDO regulators use a soft-start (SS) pin that is different than the combination noise reduction and soft-start (NR/SS) pin already discussed. Devices that include a SS pin include the TPS7A74, TPS74401, and TPS748A. While the SS pin programs the VOUT rise time, unlike the NR/SS pin it does not reduce the device noise. Using a soft-start pin, and assuming no CFF is installed, the output rises linearly by tracking the voltage ramp of the external soft-start capacitor until the voltage exceeds the internal reference. The same analysis and equations are used as shown in Section 2.1.3, except VCO = VREF in these LDO regulators.

Modern LDO regulators are trimmed to provide excellent accuracy during steady state. However, any device that includes a soft-start pin may not be trimmed during turn-on and a non-negligible VOS may affect the turn-on behavior. This behavior includes slightly faster turn on-time (positive VOS) than originally anticipated, as well as a small voltage step in the output voltage during initial turn on.

After t > tCO, VCO_FF is calculated using Equation 25 while setting t = tCO and VFB(t) = VREF.

When t ≤ tCO, use Equation 24 and Equation 25.

When t > tCO, use Equation 15 and Equation 19.

Equation 24. V F B = I F C C S S × t + V O S
Equation 25. V T O P t = V F B t × R T O P R B O T T O M + I F C C S S × R T O P R B O T T O M × τ F F × e - t τ F F - 1

The TPS7A74 uses a precision voltage reference with a SS pin. The soft-start current variation with temperature is described in Figure 6-37 in the TPS7A74 data sheet [6]. The offset voltage during turn-on is shown in Figure 2-6. VCO = VREF and Equation 7, Equation 11 through Equation 14, Equation 17 through Equation 20 are used for the analysis. The EVM was used for the measurements with a derated value of CSS = 825 nF according to the capacitor manufacturer. The comparison between the analysis and measurement is provided in Figure 2-8 .