SPRADC3 june   2023 AM2431 , AM2432 , AM2434 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P4 , AM263P4-Q1 , AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3358-EP , AM3359 , AM4372 , AM4376 , AM4377 , AM4378 , AM4379 , AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL , AM5726 , AM5728 , AM5729 , AM5746 , AM5748 , AM5749 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442 , AM6526 , AM6528 , AM6546 , AM6548

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction to 8b-10b Line Coding
  5. 2PRU Implementation for Data Transmitting and Receiving
    1. 2.1 Encoding and Decoding Data
    2. 2.2 PRU Module Interface and GPIO Mode
    3. 2.3 PRU GPIO Shift-out and Shift-in Mode for Communication
    4. 2.4 Three-channel Peripheral Interface for Communication
    5. 2.5 LVDS and M-LVDS Interface
  6. 3System Solution With CRC Module and Over-head Optimization
    1. 3.1 PRU CRC16/32 Module
    2. 3.2 Encode and Decode Over-head Optimization
  7. 4Verification
  8. 5Summary
  9. 6References

5 Summary

This application note provides an approach for using PRU to implement 8b-10b line coding with 100Mbps data rate and transmitting data with an LVDS interface. The line coding in PRU with an LVDS interface is flexible for defining custom protocol for intra-drive communication to achieve high-speed data rates, low jitter, and low latency.