These high-speed monolithic counters consist of four d-c coupled, master-slave
flip-flops, which are internally interconnected to provide either a divide-by-two
and a divide-by-five counter (196, LS196, S196) or a divide-by-two and
a divide-by-eight counter (197, LS197, S197). These four counters are fully programmable; that is, the outputs may be preset to any state by placing a
low on the count/load input and entering the desired data at the data inputs.
The outputs will change to agree with the data inputs independent of the state
of the clocks.
During the count operation, transfer of information to the outputs occurs
on the negative-going edge of the clock pulse. These counters feature a direct
clear which when taken low sets all outputs low regardless of the states of
the clocks.
These counters may also be used as 4-bit latches by using the
count/load input as the strobe and entering data at the data inputs. The outputs
will directly follow the data inputs when the count/load is low, but will
remain unchanged when the count/load is high and the clock inputs are inactive.
All inputs are diode-clamped to minimize transmission-line effects and
simplify system design. These circuits are compatible with most TTL logic
families. Series 54, 54LS, and 54S circuits are characterized for operation
over the full military temperature range of -55°C to 125°C; Series
74, 74LS, and 74S circuits are characterized for operation from 0°C to
70°C.
These high-speed monolithic counters consist of four d-c coupled, master-slave
flip-flops, which are internally interconnected to provide either a divide-by-two
and a divide-by-five counter (196, LS196, S196) or a divide-by-two and
a divide-by-eight counter (197, LS197, S197). These four counters are fully programmable; that is, the outputs may be preset to any state by placing a
low on the count/load input and entering the desired data at the data inputs.
The outputs will change to agree with the data inputs independent of the state
of the clocks.
During the count operation, transfer of information to the outputs occurs
on the negative-going edge of the clock pulse. These counters feature a direct
clear which when taken low sets all outputs low regardless of the states of
the clocks.
These counters may also be used as 4-bit latches by using the
count/load input as the strobe and entering data at the data inputs. The outputs
will directly follow the data inputs when the count/load is low, but will
remain unchanged when the count/load is high and the clock inputs are inactive.
All inputs are diode-clamped to minimize transmission-line effects and
simplify system design. These circuits are compatible with most TTL logic
families. Series 54, 54LS, and 54S circuits are characterized for operation
over the full military temperature range of -55°C to 125°C; Series
74, 74LS, and 74S circuits are characterized for operation from 0°C to
70°C.