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TPS65218D0

ACTIVE

Integrated power management (PMIC) for ARM® Cortex™-A8/A9 SOCs and FPGAs

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Data sheet

TPS65218D0

ACTIVE
Data sheet Order now

Product details

Regulated outputs (#) 7 Configurability Factory programmable, Software configurable, User programmable Vin (min) (V) 2.2 Vin (max) (V) 5.5 Vout (min) (V) 0.85 Vout (max) (V) 3.4 Iout (max) (A) 1.8 Features Dynamic voltage scaling, Eco-mode, I2C control, Overcurrent protection, Power good, Power sequencing, Power supply and system monitoring, Thermal shutdown, UVLO adjustable Step-up DC/DC converter 1 Step-down DC/DC converter 5 Step-down DC/DC controller 0 Step-up DC/DC controller 0 LDO 1 Iq (typ) (mA) 0.025 Rating Catalog Switching frequency (max) (kHz) 2400 Operating temperature range (°C) -40 to 105 Processor supplier Texas Instruments Processor name Sitara AM335x, Sitara AM43x Switching frequency (typ) (kHz) 2400 Product type Processor and FPGA
Regulated outputs (#) 7 Configurability Factory programmable, Software configurable, User programmable Vin (min) (V) 2.2 Vin (max) (V) 5.5 Vout (min) (V) 0.85 Vout (max) (V) 3.4 Iout (max) (A) 1.8 Features Dynamic voltage scaling, Eco-mode, I2C control, Overcurrent protection, Power good, Power sequencing, Power supply and system monitoring, Thermal shutdown, UVLO adjustable Step-up DC/DC converter 1 Step-down DC/DC converter 5 Step-down DC/DC controller 0 Step-up DC/DC controller 0 LDO 1 Iq (typ) (mA) 0.025 Rating Catalog Switching frequency (max) (kHz) 2400 Operating temperature range (°C) -40 to 105 Processor supplier Texas Instruments Processor name Sitara AM335x, Sitara AM43x Switching frequency (typ) (kHz) 2400 Product type Processor and FPGA
HTQFP (PHP) 48 81 mm² 9 x 9 VQFN (RSL) 48 36 mm² 6 x 6
  • Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, DCDC3):
    • DCDC1: 1.1-V Default, up to 1.8 A
    • DCDC2: 1.1-V Default, up to 1.8 A
    • DCDC3: 1.2-V Default, up to 1.8 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2)
    • Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3)
    • Power Save Mode at Light Load Current
    • 100% Duty Cycle for Lowest Dropout
    • Active Output-Discharge When Disabled
  • One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4):
    • DCDC4: 3.3 V Default, up to 1.6 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 1.175 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Two Low-Quiescent Current, High Efficiency Step-Down Converters for Battery Backup Domain (DCDC5, DCDC6)
    • DCDC5: 1-V Output
    • DCDC6: 1.8-V Output
    • VIN Range from 2.2 V to 5.5 V
    • Supplied From System Power or Coin-Cell Backup Battery
  • Adjustable General-Purpose LDO (LDO1)
    • LDO1: 1.8-V Default up to 400 mA
    • VIN Range From 1.8 V to 5.5 V
    • Adjustable Output Voltage Range From 0.9 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Low-Voltage Load Switch (LS1) With 350-mA Current Limit
    • VIN Range From 1.2 V to 3.6 V
    • 110-mΩ (Max) Switch Impedance at 1.35 V
  • 5-V Load Switch (LS2) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 3 V to 5.5 V
    • 500-mΩ (Max) Switch Impedance at 5 V
  • High-Voltage Load Switch (LS3) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 1.8 V to 10 V
    • 500-mΩ (Max) Switch Impedance
  • Supervisor With Built-in Supervisor Function Monitors
    • DCDC1, DCDC2 ±4% Tolerance
    • DCDC3, DCDC4 ±5% Tolerance
    • LDO1 ±5% Tolerance
  • Protection, Diagnostics, and Control:
    • Undervoltage Lockout (UVLO)
    • Always-on Push-Button Monitor
    • Overtemperature Warning and Shutdown
    • Separate Power-Good Output for Backup and Main Supplies
    • I2C Interface (Address 0x24) (See Timing Requirements for I2C Operation at 400 kHz)
  • Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, DCDC3):
    • DCDC1: 1.1-V Default, up to 1.8 A
    • DCDC2: 1.1-V Default, up to 1.8 A
    • DCDC3: 1.2-V Default, up to 1.8 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2)
    • Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3)
    • Power Save Mode at Light Load Current
    • 100% Duty Cycle for Lowest Dropout
    • Active Output-Discharge When Disabled
  • One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4):
    • DCDC4: 3.3 V Default, up to 1.6 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 1.175 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Two Low-Quiescent Current, High Efficiency Step-Down Converters for Battery Backup Domain (DCDC5, DCDC6)
    • DCDC5: 1-V Output
    • DCDC6: 1.8-V Output
    • VIN Range from 2.2 V to 5.5 V
    • Supplied From System Power or Coin-Cell Backup Battery
  • Adjustable General-Purpose LDO (LDO1)
    • LDO1: 1.8-V Default up to 400 mA
    • VIN Range From 1.8 V to 5.5 V
    • Adjustable Output Voltage Range From 0.9 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Low-Voltage Load Switch (LS1) With 350-mA Current Limit
    • VIN Range From 1.2 V to 3.6 V
    • 110-mΩ (Max) Switch Impedance at 1.35 V
  • 5-V Load Switch (LS2) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 3 V to 5.5 V
    • 500-mΩ (Max) Switch Impedance at 5 V
  • High-Voltage Load Switch (LS3) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 1.8 V to 10 V
    • 500-mΩ (Max) Switch Impedance
  • Supervisor With Built-in Supervisor Function Monitors
    • DCDC1, DCDC2 ±4% Tolerance
    • DCDC3, DCDC4 ±5% Tolerance
    • LDO1 ±5% Tolerance
  • Protection, Diagnostics, and Control:
    • Undervoltage Lockout (UVLO)
    • Always-on Push-Button Monitor
    • Overtemperature Warning and Shutdown
    • Separate Power-Good Output for Backup and Main Supplies
    • I2C Interface (Address 0x24) (See Timing Requirements for I2C Operation at 400 kHz)

The TPS65218D0 is a single chip, power-management IC (PMIC) specifically designed to support the AM335x and AM438x line of processors in both portable (Li-Ion battery) and nonportable (5-V adapter) applications. The device is characterized across a –40°C to +105°C temperature range, making it suitable for various industrial applications.

The TPS65218D0 is specifically designed to provide power management for all the functionalities of the AM438x processor. The DC/DC converters DCDC1 through DCDC4 are intended to power the core, MPU, DDR memory, and 3.3-V analog and I/O, respectively. LDO1 provides the 1.8-V analog and I/O for the processor. GPIO1 and GPO2 allow for memory reset and GPIO3 allows for warm reset (335x only) of the DCDC1 and DCDC2 converters. The I2C interface allows the user to enable and disable all voltage regulators, load switches, and GPIOs. Additionally, UVLO and supervisor voltage thresholds, power-up sequence, and power-down sequence can be programmed through I2C. Interrupts for overtemperature, overcurrent, and undervoltage can be monitored as well. The supervisor monitors DCDC1 through DCDC4 and LDO1. The supervisor has two settings, one for typical undervoltage tolerance (STRICT = 0b), and one for tight undervoltage and overvoltage tolerances (STRICT = 1b). A power-good signal indicates proper regulation of the five voltage regulators.

Three hysteretic step-down converters are targeted at providing power for the processor core, MPU, and DDRx memory. The default output voltages for each converter can be adjusted through the I2C interface. DCDC1 and DCDC2 feature dynamic voltage scaling to provide power at all operating points of the processor. DCDC1 and DCDC2 also have programmable slew rates to help protect processor components. DCDC3 remains powered while the processor is in a sleep mode to maintain power to DDRx memory. Backup power provides two step-down converters for the tamper, RTC, or both domains of the processor if system power fails or is disabled. If both system power and coin-cell battery are connected to the PMIC, power is not drawn from the coin-cell battery. A separate power good signal monitors the backup converters. A battery backup monitor determines the power level of the coin-cell battery.

The TPS65218D0 device is available in a 48-pin VQFN package (6 mm × 6 mm, 0.4-mm pitch).

The TPS65218D0 is a single chip, power-management IC (PMIC) specifically designed to support the AM335x and AM438x line of processors in both portable (Li-Ion battery) and nonportable (5-V adapter) applications. The device is characterized across a –40°C to +105°C temperature range, making it suitable for various industrial applications.

The TPS65218D0 is specifically designed to provide power management for all the functionalities of the AM438x processor. The DC/DC converters DCDC1 through DCDC4 are intended to power the core, MPU, DDR memory, and 3.3-V analog and I/O, respectively. LDO1 provides the 1.8-V analog and I/O for the processor. GPIO1 and GPO2 allow for memory reset and GPIO3 allows for warm reset (335x only) of the DCDC1 and DCDC2 converters. The I2C interface allows the user to enable and disable all voltage regulators, load switches, and GPIOs. Additionally, UVLO and supervisor voltage thresholds, power-up sequence, and power-down sequence can be programmed through I2C. Interrupts for overtemperature, overcurrent, and undervoltage can be monitored as well. The supervisor monitors DCDC1 through DCDC4 and LDO1. The supervisor has two settings, one for typical undervoltage tolerance (STRICT = 0b), and one for tight undervoltage and overvoltage tolerances (STRICT = 1b). A power-good signal indicates proper regulation of the five voltage regulators.

Three hysteretic step-down converters are targeted at providing power for the processor core, MPU, and DDRx memory. The default output voltages for each converter can be adjusted through the I2C interface. DCDC1 and DCDC2 feature dynamic voltage scaling to provide power at all operating points of the processor. DCDC1 and DCDC2 also have programmable slew rates to help protect processor components. DCDC3 remains powered while the processor is in a sleep mode to maintain power to DDRx memory. Backup power provides two step-down converters for the tamper, RTC, or both domains of the processor if system power fails or is disabled. If both system power and coin-cell battery are connected to the PMIC, power is not drawn from the coin-cell battery. A separate power good signal monitors the backup converters. A battery backup monitor determines the power level of the coin-cell battery.

The TPS65218D0 device is available in a 48-pin VQFN package (6 mm × 6 mm, 0.4-mm pitch).
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TPS65219 ACTIVE Integrated power management (PMIC) for Arm® Cortex®- A53 processors and FPGAs TPS65219 has higher current capability, more LDOs, supports lower output voltages, has no Buck-Boost nor Coin Cell-backup support and a smaller package size

Technical documentation

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Type Title Date
* Data sheet TPS65218D0 Power Management for ARM Cortex-A8/A9 SOCs and FPGAs datasheet (Rev. B) PDF | HTML 28 Sep 2018
Application note 4스위치 벅 부스트 전력 단계의 기본 계산 (Rev. C) PDF | HTML 02 Oct 2023
EVM User's guide TPS65218EVM User's Guide (Rev. B) PDF | HTML 16 Sep 2022
Application note Powering Processors and FPGAs With a Single Family of PMICs (Rev. A) 14 Apr 2020
Application note TPS6521815 Power Management IC (PMIC) for Industrial Applications (Rev. A) 28 Feb 2020
User guide Powering the AM335x, AM437x, and AM438x with TPS65218D0 (Rev. B) 27 Feb 2020
Application note How to Design Flexible Processor Power Systems Using PMICs (Rev. B) 27 Jan 2020
Application brief Powering the NXP i.MX 6Solo, 6DualLite with the TPS6521815 PMIC (Rev. A) PDF | HTML 09 Dec 2019
Application brief Powering the NXP i.MX 7 Processor with the TPS6521815 PMIC (Rev. A) PDF | HTML 09 Dec 2019
Application brief Powering the NXP i.MX 8M Mini and Nano with the TPS6521825 and LP873347 PMICs (Rev. B) PDF | HTML 09 Dec 2019
Application note AM335x PMIC Selection Guide (Rev. A) 19 Sep 2019
Application note Basic Calculations of a 4 Switch Buck-Boost Power Stage (Rev. B) 09 Jul 2018
EVM User's guide BOOSTXL-TPS65218 EVM User's Guide 31 May 2018
Third party document Optimizing power delivery with PMICs 12 Dec 2017
White paper Simple power rail sequencing solutions for complex multi-rail systems 06 Jul 2016
Application note Basic Calculation of a Buck Converter's Power Stage (Rev. B) 17 Aug 2015
White paper Advantages of PMIC converters with enhanced hysteretic-mode control 30 Mar 2015

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