Startseite Energiemanagement Linear- und Low-Dropout-Regler (LDO)

TPS777

AKTIV

Low-Dropout-Spannungsregler, 750 mA, 10 V mit Aktivierung und RÜCKSETZUNG mit Verzögerung

Produktdetails

Output options Adjustable Output, Fixed Output Iout (max) (A) 0.75 Vin (max) (V) 10 Vin (min) (V) 2.7 Vout (max) (V) 5.5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Noise (µVrms) 54 Iq (typ) (mA) 0.08 Thermal resistance θJA (°C/W) 43, 57.9 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 PSRR at 100 KHz (dB) 29 Dropout voltage (Vdo) (typ) (mV) 260 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 0.75 Vin (max) (V) 10 Vin (min) (V) 2.7 Vout (max) (V) 5.5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Noise (µVrms) 54 Iq (typ) (mA) 0.08 Thermal resistance θJA (°C/W) 43, 57.9 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 PSRR at 100 KHz (dB) 29 Dropout voltage (Vdo) (typ) (mV) 260 Operating temperature range (°C) -40 to 125
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4 SOIC (D) 8 29.4 mm² 4.9 x 6
  • Open Drain Power-On Reset With 200-ms Delay (TPS777xx)
  • Open Drain Power Good (TPS778xx)
  • 750-mA Low-Dropout Voltage Regulator
  • Avilable in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed Output and Adjustable Versions
  • Dropout Voltage to 260 mV (Typ) at 750 mA (TPS77x33)
  • Ultralow 85 µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 8-Pin SOIC and 20-Pin TSSOP PowerPAD™ (PWP) Package
  • Thermal Shutdown Protection

All trademarks are the property of their respective owners.

  • Open Drain Power-On Reset With 200-ms Delay (TPS777xx)
  • Open Drain Power Good (TPS778xx)
  • 750-mA Low-Dropout Voltage Regulator
  • Avilable in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed Output and Adjustable Versions
  • Dropout Voltage to 260 mV (Typ) at 750 mA (TPS77x33)
  • Ultralow 85 µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 8-Pin SOIC and 20-Pin TSSOP PowerPAD™ (PWP) Package
  • Thermal Shutdown Protection

All trademarks are the property of their respective owners.

TPS777xx and TPS778xx are designed to have a fast transient response and be stable with a 10-µF low ESR capacitors. This combination provides high performance at a reasonable cost.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 260 mV at an output current of 750 mA for the TPS77x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 mA to 750 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.

The RESET\ output of the TPS777xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS777xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.

Power good (PG) of the TPS778xx is an active high output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS777xx and TPS778xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V for TPS77701 option and 1.2 V to 5.5 V for TPS77801 option). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS777xx and TPS778xx families are available in 8 pin SOIC and 20 pin PWP packages.

TPS777xx and TPS778xx are designed to have a fast transient response and be stable with a 10-µF low ESR capacitors. This combination provides high performance at a reasonable cost.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 260 mV at an output current of 750 mA for the TPS77x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 mA to 750 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.

The RESET\ output of the TPS777xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS777xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.

Power good (PG) of the TPS778xx is an active high output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS777xx and TPS778xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V for TPS77701 option and 1.2 V to 5.5 V for TPS77801 option). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS777xx and TPS778xx families are available in 8 pin SOIC and 20 pin PWP packages.

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Technische Dokumentation

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Alle anzeigen 4
Typ Titel Datum
* Data sheet TPS777/8xx: Fast-Transient-Response 750-mA LDO Voltage Regulators datasheet (Rev. G) 05 Jan 2004
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note PowerPAD™ Thermally Enhanced Package (Rev. H) 06 Jul 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017

Design und Entwicklung

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HTSSOP (PWP) 20 Ultra Librarian
SOIC (D) 8 Ultra Librarian

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