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Low-Side-Treiber

UCC27526

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5-A/5-A-Dual-Channel-Gate-Treiber mit 5-V-UVLO, Aktivierung und zweifachen TTL-Eingängen

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Selbe Funktionalität wie der verglichene Baustein bei abweichender Anschlussbelegung
UCC27624 AKTIV 2-Kanal-Gate-Treiber, 5 A/5 A, mit 4 V UVLO, 30 V VDD und geringer Ausbreitungsverzögerung This is a newer dual channel low-side driver with improved noise and transient handling.

UCC27526

AKTIV
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Produktdetails

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Flexible Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Flexible
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Flexible Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Flexible
WSON (DSD) 8 9 mm² 3 x 3
  • Industry-standard pinout
  • Two independent gate-drive channels
  • 5A peak source and sink-drive current
  • Independent-enable function for each output
  • TTL and CMOS compatible logic threshold independent of supply voltage
  • Hysteretic-logic thresholds for high noise immunity
  • Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
  • 4.5V to 18V single-supply range
  • Outputs held low during VDD-UVLO, (ensures glitch-free operation at power up and power down)
  • Fast propagation delays (13ns typical)
  • Fast rise and fall times (7ns and 6ns typical)
  • 1ns typical delay matching between two channels
  • Two outputs are in parallel for higher drive current
  • Outputs held low when inputs floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and 3mm × 3mm WSON-8 package options
  • Operating temperature range of –40°C to 140°C
  • Industry-standard pinout
  • Two independent gate-drive channels
  • 5A peak source and sink-drive current
  • Independent-enable function for each output
  • TTL and CMOS compatible logic threshold independent of supply voltage
  • Hysteretic-logic thresholds for high noise immunity
  • Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
  • 4.5V to 18V single-supply range
  • Outputs held low during VDD-UVLO, (ensures glitch-free operation at power up and power down)
  • Fast propagation delays (13ns typical)
  • Fast rise and fall times (7ns and 6ns typical)
  • 1ns typical delay matching between two channels
  • Two outputs are in parallel for higher drive current
  • Outputs held low when inputs floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and 3mm × 3mm WSON-8 package options
  • Operating temperature range of –40°C to 140°C

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provides the combination of three standard logic options — dual inverting, dual noninverting, one inverting and one noninverting driver. The UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523 and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

The UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3mm × 3mm WSON-8 with exposed pad (DSD) packages. The UCC27526 is only offered in a 3mm × 3mm WSON (DSD) package.

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provides the combination of three standard logic options — dual inverting, dual noninverting, one inverting and one noninverting driver. The UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523 and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

The UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3mm × 3mm WSON-8 with exposed pad (DSD) packages. The UCC27526 is only offered in a 3mm × 3mm WSON (DSD) package.
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Technische Dokumentation

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Typ Titel Datum
* Data sheet UCC2752x Dual 5A High-Speed, Low-Side Gate Drivers datasheet (Rev. H) PDF | HTML 14 Jun 2024
Application note Why use a Gate Drive Transformer? PDF | HTML 04 Mär 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 Jan 2024
Application note Static Magnet Power Supply Design for Magnetic Resonance Imaging Application PDF | HTML 22 Jan 2024
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10 Nov 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Application note Improving Efficiency of DC-DC Conversion through Layout 07 Mai 2019
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 Jan 2019
Application brief High-Side Cutoff Switches for High-Power Automotive Applications (Rev. A) 26 Nov 2018
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Okt 2018
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16 Mär 2018

Design und Entwicklung

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Simulationsmodell

UCC27526 PSpice Transient Model

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UCC27526 Unencrypted PSpice Transient Model

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Berechnungstool

SLURB22 — UCC2752X Schematic Review Template

Unterstützte Produkte und Hardware

Unterstützte Produkte und Hardware

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Low-Side-Treiber
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