Detalles del producto

Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 3.5 CON (typ) (pF) 13 Supply current (typ) (µA) 700 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 3.5 CON (typ) (pF) 13 Supply current (typ) (µA) 700 Bandwidth (MHz) 500 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5
  • High-Bandwidth Data Path (Up to 500 MHz) (1)
  • 5-V Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Ω Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.6 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signal Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V and 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface Bus Isolation, Low-Distortion Signal Gating (1)

(1) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report CBT-C, CB3T, and CB3Q Signal-Switch Families, (SCDA008).

  • High-Bandwidth Data Path (Up to 500 MHz) (1)
  • 5-V Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4 Ω Typical)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical)
  • Fast Switching Frequency (fOE = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.6 mA Typical)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signal Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V and 3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface Bus Isolation, Low-Distortion Signal Gating (1)

(1) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report CBT-C, CB3T, and CB3Q Signal-Switch Families, (SCDA008).

The SN74CB3Q3253 device is a high-bandwidth FET bus switch using a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input and output (I/O) ports.

The SN74CB3Q3253 device is a high-bandwidth FET bus switch using a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input and output (I/O) ports.

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Documentación técnica

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* Data sheet SN74CB3Q3253 Dual 1-of-4 FET Multiplexer – Demultiplexer 2.5-V – 3.3-V Low-Voltage High-Bandwidth Bus Switch datasheet (Rev. C) PDF | HTML 27 jun 2018
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 19 nov 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 06 ene 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 feb 2003

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Adaptador de interfaz

LEADED-ADAPTER1 — Adaptador de montaje superficial a conector macho DIP para pruebas rápidas de encapsulados con plomo

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Guía del usuario: PDF
Adaptador de interfaz

LEADLESS-ADAPTER1 — Adaptador de montaje superficial a conector macho DIP para pruebas de encapsulados sin plomo de 6, 8

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
Guía del usuario: PDF
Modelo de simulación

HSPICE MODEL OF SN74CB3Q3253

SCEJ209.ZIP (96 KB) - HSpice Model
Modelo de simulación

SN74CB3Q3253 IBIS Model

SCDM060.ZIP (25 KB) - IBIS Model
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SSOP (DBQ) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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