Switch Connection Between Two PortsThe SN74CBTLV3245A provides eight bits of high-speed bus switching in a standard '245 device pinout. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as one 8-bit switch. When output enable (OE) is low, the 8-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| SOIC (DW) | 20 | Ultra Librarian |
| SSOP (DBQ) | 20 | Ultra Librarian |
| TSSOP (PW) | 20 | Ultra Librarian |
| TVSOP (DGV) | 20 | Ultra Librarian |
| VQFN (RGY) | 20 | Ultra Librarian |
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