SN74HC4066 no se recomienda para nuevos diseños
Aunque esta producto sigue en producción para dar soporte a diseños anteriores, no lo recomendamos para nuevos diseños. Considere una de estas alternativas:
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Pin por pin con la misma funcionalidad que el dispositivo comparado
SN74AHC4066 ACTIVO Interruptor analógico de uso general de 4 canales y 5 V, 1:1 (SPST) Smaller package options available

Detalles del producto

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 3 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 2 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 3 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 2 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8
  • Wide operating voltage range of 1V to 6V
  • Typical switch enable time of 18ns
  • Low power consumption, 20µA maximum ICC
  • Low input current of 1µA maximum
  • High degree of linearity
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Low on-state impedance: 50Ω typical at VCC = 6V
  • Individual switch controls
  • Wide operating voltage range of 1V to 6V
  • Typical switch enable time of 18ns
  • Low power consumption, 20µA maximum ICC
  • Low input current of 1µA maximum
  • High degree of linearity
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Low on-state impedance: 50Ω typical at VCC = 6V
  • Individual switch controls

The SN74HC4066 device is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 6V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

The SN74HC4066 device is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 6V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

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Documentación técnica

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Tipo Título Fecha
* Data sheet SN74HC4066 Quadruple Bilateral Analog Switch datasheet (Rev. K) PDF | HTML 09 feb 2024
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 abr 2024
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 jun 1997
Application note Designing With Logic (Rev. C) 01 jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 may 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 abr 1996

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Adaptador de interfaz

LEADED-ADAPTER1 — Adaptador de montaje superficial a conector macho DIP para pruebas rápidas de encapsulados con plomo

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
PDIP (N) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

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