Inicio Gestión de la energía Circuitos integrados de alimentación para memoria DDR

TPS7H3302-SEP

ACTIVO

Regulador LDO de 2.3 V a 3.5 V de entrada, 3 A de fuente y disipador con terminación DDR, con tolera

Detalles del producto

DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
HTSSOP (DAP) 32 89.1 mm² 11 x 8.1
  • QMLP TPS7H3302-SP standard microcircuit drawing (SMD) available, 5962R14228
  • Space Ehanced Plastic Vendor item drawing available, VID V62/22615
  • Total ionizing dose (TID) charactericized
    • Radiation hardness assured (RHA) qualified up to total ionizing dose (TID) 100 krad(Si) or 50 krad(Si)
  • Single-Event Effects (SEE) Charactericized
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune up to LET = 70 MeV-cm2 /mg
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized up to 70 MeVcm2 /mg
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency
  • 3-A sink and source termination regulator
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
    • ±10 mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • Plastic package
  • QMLP TPS7H3302-SP standard microcircuit drawing (SMD) available, 5962R14228
  • Space Ehanced Plastic Vendor item drawing available, VID V62/22615
  • Total ionizing dose (TID) charactericized
    • Radiation hardness assured (RHA) qualified up to total ionizing dose (TID) 100 krad(Si) or 50 krad(Si)
  • Single-Event Effects (SEE) Charactericized
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune up to LET = 70 MeV-cm2 /mg
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized up to 70 MeVcm2 /mg
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency
  • 3-A sink and source termination regulator
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
    • ±10 mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • Plastic package

The TPS7H3302 is a radiation-hardend double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3302 supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR3L, and DDR4. The fast transient response of the TPS7H3302 VTT regulator allows for a very stable supply during read/write conditions. The TPS7H3302 also includes a built-in VTTREF supply that tracks VTT to further reduce the solution size. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3302. The enable signal can also be used to discharge VTT during suspend to RAM (S3) power down mode.

The TPS7H3302 is a radiation-hardend double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3302 supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR3L, and DDR4. The fast transient response of the TPS7H3302 VTT regulator allows for a very stable supply during read/write conditions. The TPS7H3302 also includes a built-in VTTREF supply that tracks VTT to further reduce the solution size. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3302. The enable signal can also be used to discharge VTT during suspend to RAM (S3) power down mode.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TPS7H3302-SP and TPS7H3302-SEP 3-A DDR Radiation Hardened Termination Regulator datasheet (Rev. B) PDF | HTML 14 dic 2023
* Radiation & reliability report TPS7H3302-SEP and TPS7H3302-SP Neutron Displacement Damage Characterization Test Report (Rev. A) 16 feb 2024
* Radiation & reliability report TPS7H3302-SEP Total Ionizing Dose (TID) Radiation Report (Rev. B) 11 jul 2023
* VID TPS7H3302-SEP VID V62-22615 09 jun 2023
* Radiation & reliability report TPS7H3302-SEP Production Flow and Reliability Report PDF | HTML 10 may 2023
* Radiation & reliability report Single Event Effects Report of the TPS7H3302-SEP Sink and Source DDR Termination 13 ene 2023
Selection guide TI Space Products (Rev. J) 12 feb 2024
Application note Using Space Grade Power Components to Power AMD Kintex XQRKU060 FPGA PDF | HTML 08 nov 2023
Application note Using Space Grade Power Components to Power Microchip RT PolarFire FPGA PDF | HTML 20 sep 2023
Application note Space Grade Power Solution for Microsemi RTG4 PDF | HTML 02 may 2023
EVM User's guide TPS7H3002EVM (LP085) User's Guide (Rev. A) PDF | HTML 27 abr 2023
Certificate TPS7H3302EVM EU RoHS Declaration of Conformity (DoC) (Rev. A) 11 abr 2023
Application note Reduce the Risk in Low-Earth Orbit Missions with Space Enhanced Plastic Products (Rev. A) PDF | HTML 15 sep 2022
E-book Radiation Handbook for Electronics (Rev. A) 21 may 2019

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TPS7H3302EVM — Módulo de evaluación TPS7H3302 para regulador LDO de terminación DDR de fuente y disipador de 3 A

El módulo de evaluación (EVM) TPS7H3302 (LP085) es una plataforma para evaluar el rendimiento y las características del TPS7H3302-SEP, que es un regulador de caída baja (LDO) de terminación DDR-, DDR2-, DDR3-, DDR3L- y DDR4 con tolerancia a la radiación.

Guía del usuario: PDF | HTML
Placa de evaluación

ALPHA-3P-ADM-VA600-SPACE-AMD — Kit Alpha Data ADM-VA600 con núcleo AMD Versal XQRVC1902 ACAP y productos TI tolerantes a la radiaci

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Placa de evaluación

ALPHA-3P-ADM-VA601-SPACE-AMD — Kit Alpha Data ADM-VA601 con núcleo AMD Versal XQRVC1902 ACAP y productos TI resistentes a la radiac

Se trata de un factor de forma VPX 6U que destaca el SoC/FPGA adaptable AMD-Xilinx® Versal AI Core XQRVC1902. El ADM-VA600 tiene un diseño de placa modular con un conector FMC+, DDR4 DRAM y monitorización del sistema. La mayoría de los componentes son dispositivos de alimentación, interfaz, reloj y (...)

Modelo de simulación

TPS7H3302-SEP PSpice Model

SLVME03.ZIP (45 KB) - PSpice Model
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
HTSSOP (DAP) 32 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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