Detalles del producto

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5, 12 Protocols Analog Ron (typ) (Ω) 6.5 CON (typ) (pF) 19 ON-state leakage current (max) (µA) 0.01 Supply current (typ) (µA) 0.03 Bandwidth (MHz) 530 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 20 Rating Catalog Drain supply voltage (max) (V) 12 Supply voltage (max) (V) 12
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5, 12 Protocols Analog Ron (typ) (Ω) 6.5 CON (typ) (pF) 19 ON-state leakage current (max) (µA) 0.01 Supply current (typ) (µA) 0.03 Bandwidth (MHz) 530 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 20 Rating Catalog Drain supply voltage (max) (V) 12 Supply voltage (max) (V) 12
SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • 2-V to 12-V Single-Supply Operation
  • Specified ON-State Resistance:
    • 15-Ω Maximum With 12-V Supply
    • 20-Ω Maximum With 5-V Supply
    • 50-Ω Maximum With 3.3-V Supply
  • ΔRON Matching
    • 2.5-Ω (Max) at 12 V
    • 3-Ω (Max) at 5 V
    • 3.5-Ω (Max) at 3.3 V
  • Specified Low OFF-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85&25;C
  • Low Charge Injection: 11.5 pC (12-V Supply)
  • Fast Switching Speed:
    tON = 80 ns, tOFF = 50 ns
    (12-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • TTL/CMOS-Logic Compatible With 5-V Supply
  • Available in 14-Pin TSSOP Package or 14-Pin
    SOIC Package
  • 2-V to 12-V Single-Supply Operation
  • Specified ON-State Resistance:
    • 15-Ω Maximum With 12-V Supply
    • 20-Ω Maximum With 5-V Supply
    • 50-Ω Maximum With 3.3-V Supply
  • ΔRON Matching
    • 2.5-Ω (Max) at 12 V
    • 3-Ω (Max) at 5 V
    • 3.5-Ω (Max) at 3.3 V
  • Specified Low OFF-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85&25;C
  • Low Charge Injection: 11.5 pC (12-V Supply)
  • Fast Switching Speed:
    tON = 80 ns, tOFF = 50 ns
    (12-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • TTL/CMOS-Logic Compatible With 5-V Supply
  • Available in 14-Pin TSSOP Package or 14-Pin
    SOIC Package

The TS12A44513, TS12A44514, and TS12A44515 devices have four bidirectional single-pole single-throw (SPST) single-supply CMOS analog switches. The TS12A44513 has two normally closed (NC) switches and two normally open (NO) switches, the TS12A44514 has four NO switches, and the TS12A44515 has four NC switches.

These CMOS switches may operate continuously with a single supply from 2 V to 12 V and can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 1 nA at 25°C or 10 nA at 85°C.

When using a 5-V supply, all digital inputs have 0.8-V to 2.4-V logic thresholds, ensuring TTL/CMOS-logic compatibility.

The TS12A44513, TS12A44514, and TS12A44515 devices have four bidirectional single-pole single-throw (SPST) single-supply CMOS analog switches. The TS12A44513 has two normally closed (NC) switches and two normally open (NO) switches, the TS12A44514 has four NO switches, and the TS12A44515 has four NC switches.

These CMOS switches may operate continuously with a single supply from 2 V to 12 V and can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 1 nA at 25°C or 10 nA at 85°C.

When using a 5-V supply, all digital inputs have 0.8-V to 2.4-V logic thresholds, ensuring TTL/CMOS-logic compatibility.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TS12A4451x Low ON-State Resistance 4-Channel SPST CMOS Analog Switches datasheet (Rev. B) PDF | HTML 01 feb 2016
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application note Preventing Excess Power Consumption on Analog Switches 03 jul 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Adaptador de interfaz

LEADED-ADAPTER1 — Adaptador de montaje superficial a conector macho DIP para pruebas rápidas de encapsulados con plomo

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

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