BQ2205LY
- Power Monitoring and Switching for Non-Volatile Control of SRAMs
- Input Decoder Allows Control of 1 or 2 Banks of SRAM
- Write-Protect Control
- 3-V Primary Cell Input
- 3.3-V Operation
- Reset Output for System Power-On Reset
- Less than 20-ns Chip Enable Propagation Delay
- Small 16-Lead TSSOP Package
- APPLICATIONS
- NVSRAM Modules
- Point-of-Sale Systems
- Facsimile, Printers and Photocopiers
- Internet Appliances
- Servers
- Medical Instrumentation and Industrial Products
The CMOS bq2205 SRAM non-volatile controller with reset provides all the necessary functions for converting one or two banks of standard CMOS SRAM into non-volatile read/write memory.
A precision comparator monitors the 3.3-V VCC input for an out-of-tolerance condition. When out-of-tolerance is detected, the two conditioned chip-enable outputs are forced inactive to write-protect both banks of SRAM.
Power for the external SRAMs, VOUT, is switched from the VCC supply to the battery-backup supply as VCC decays. On a subsequent power-up, the VOUT supply is automatically switched from the backup supply to the VCC supply. The external SRAMs are write-protected until a power-valid condition exists. The reset output provides power-fail and power-on resets for the system. During power-valid operation, the input decoder, A, selects one of two banks of SRAM.
技術資料
種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
---|---|---|---|---|---|---|
* | データシート | bq2205LY SRAM Controller データシート | 2003年 9月 25日 |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用原材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点