CD74AC04

Name: CD74AC04
Brand: TI
SKU: CD74AC04
Price: 0.158 USD

現行

8 通道、1.5-V 至 5.5-V 逆變器

立即訂購

產品規格表

document-pdfAcrobat CDx4AC04 Hex Inverters datasheet (Rev. E) (英文) PDF | HTML

CD74AC04

現行

產品規格表

立即訂購

產品詳細資料

Technology family

Supply voltage (min) (V)

1.5

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-24

Supply current (max) (µA)

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-55 to 125

Technology family

Supply voltage (min) (V)

1.5

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-24

Supply current (max) (µA)

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-55 to 125

PDIP (N)

181.42 mm² 19.3 x 9.4

SOIC (D)

51.9 mm² 8.65 x 6

AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage
Speed of Bipolar F, AS, and S, with significantly reduced power consumption
Balanced propagation delays
±24ma output drive current
- Fanout to 15 F Devices
SCR-latchup-resistant CMOS process and circuit design
Exceeds 2kV ESD protection per MIL-STD-883, method 3015

AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage
Speed of Bipolar F, AS, and S, with significantly reduced power consumption
Balanced propagation delays
±24ma output drive current
- Fanout to 15 F Devices
SCR-latchup-resistant CMOS process and circuit design
Exceeds 2kV ESD protection per MIL-STD-883, method 3015

The ’AC04 devices contain six independent inverters. The devices perform the Boolean function Y = A.

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具有施密特觸發器輸入的六路逆變器 Longer average propagation delay (12ns), lower average drive strength (7.8mA)

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	類型	標題		日期
*	Data sheet	CDx4AC04 Hex Inverters datasheet (Rev. E)	PDF \| HTML	2024年 8月 14日
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021年 7月 26日
	Selection guide	Logic Guide (Rev. AB)		2017年 6月 12日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015年 12月 2日
	More literature	HiRel Unitrode Power Management Brochure		2009年 7月 7日
	User guide	LOGIC Pocket Data Book (Rev. B)		2007年 1月 16日
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004年 7月 8日
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002年 8月 29日
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		1997年 6月 1日
	Application note	Designing With Logic (Rev. C)		1997年 6月 1日
	Application note	Input and Output Characteristics of Digital Integrated Circuits		1996年 10月 1日
	Application note	Live Insertion		1996年 10月 1日
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc		1996年 4月 1日