產品詳細資料

Resolution (Bits) 16 Number of channels 3 Sample rate (Msps) 81 Gain (min) (dB) -4.2 Gain (max) (dB) 18.4 Pd (typ) (mW) 755 Supply voltage (max) (V) 3.3 Operating temperature range (°C) 0 to 70 Output data format CMOS, LVDS Rating Catalog
Resolution (Bits) 16 Number of channels 3 Sample rate (Msps) 81 Gain (min) (dB) -4.2 Gain (max) (dB) 18.4 Pd (typ) (mW) 755 Supply voltage (max) (V) 3.3 Operating temperature range (°C) 0 to 70 Output data format CMOS, LVDS Rating Catalog
TSSOP (DGG) 56 113.4 mm² 14 x 8.1
  • LVDS/CMOS Outputs
  • LVDS/CMOS/Crystal Clock Source with PLL
    Multiplication
  • Integrated Flexible Spread Spectrum Clock
    Generation
  • CDS or S/H Processing for CCD or CIS Sensors
  • Independent Gain/Offset Correction for Each
    Channel
  • Automatic per-Channel Gain and Offset
    Calibration
  • Programmable Input Clamp Voltage
  • Flexible CCD/CIS Sensor Timing Generator
  • LVDS/CMOS Outputs
  • LVDS/CMOS/Crystal Clock Source with PLL
    Multiplication
  • Integrated Flexible Spread Spectrum Clock
    Generation
  • CDS or S/H Processing for CCD or CIS Sensors
  • Independent Gain/Offset Correction for Each
    Channel
  • Automatic per-Channel Gain and Offset
    Calibration
  • Programmable Input Clamp Voltage
  • Flexible CCD/CIS Sensor Timing Generator

The LM98725 is a fully integrated, high performance 16-Bit, 81 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. The LM98725 achieves high-speed signal throughput with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for higher speed CCD or CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a ±9-Bit offset correction DAC, and independently controlled Digital Black Level correction loops for each input. The independently programmed PGA and offset DAC allow unique values of gain and offset for each of the three analog inputs. The signals are then routed to a 81 MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity with a very low noise floor of –74 dB. The 16-bit ADC has excellent dynamic performance making the LM98725 transparent in the image reproduction chain.

A very flexible integrated Spread Spectrum Clock Generation (SSCG) modulator is included to assist with EM compliance and reduce system costs.

The LM98725 is a fully integrated, high performance 16-Bit, 81 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. The LM98725 achieves high-speed signal throughput with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for higher speed CCD or CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a ±9-Bit offset correction DAC, and independently controlled Digital Black Level correction loops for each input. The independently programmed PGA and offset DAC allow unique values of gain and offset for each of the three analog inputs. The signals are then routed to a 81 MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity with a very low noise floor of –74 dB. The 16-bit ADC has excellent dynamic performance making the LM98725 transparent in the image reproduction chain.

A very flexible integrated Spread Spectrum Clock Generation (SSCG) modulator is included to assist with EM compliance and reduce system costs.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet LM98725 3 Channel, 16-Bit, 81 MSPS Analog Front End with LVDS/CMOS Output, Integrated CCD/CIS Sensor Timing Generator and Spread Spectrum Clock Generation datasheet (Rev. H) PDF | HTML 2015年 3月 25日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

LM98725 IBIS Model

SNAM027.ZIP (40 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (DGG) 56 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片