LSF0204

現行

適用於開汲極和推拉的 4 位元雙向多電壓電平轉換器

產品詳細資料

Technology family LSF Applications I2C, SMBus Bits (#) 4 Data rate (max) (Mbps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LSF Applications I2C, SMBus Bits (#) 4 Data rate (max) (Mbps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
DSBGA (YZP) 12 3.9375 mm² 2.25 x 1.75 TSSOP (PW) 14 32 mm² 5 x 6.4 UQFN (RUT) 12 3.4 mm² 2 x 1.7 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5
  • Provides bidirectional voltage translation with no direction terminal
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30-pF capacitor load and up to 40-MHz up/down translation at 50-pF capacitor load
  • Supports Ioff, partial power-down mode (refer to Feature Description)
  • Allows bidirectional voltage level translation between
    • 0.8 V ↔ 1.8, 2.5, 3.3, 5 V
    • 1.2 V ↔ 1.8, 2.5, 3.3, 5 V
    • 1.8 V ↔ 2.5, 3.3, 5 V
    • 2.5 V ↔ 3.3, 5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5 V Tolerance I/O port to support TTL
  • Low Ron provides less signal distortion
  • High-impedance I/O terminals for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD17
  • –40°C to 125°C operating temperature range
  • ESD performance tested per JESD 22
    • 2000-V human-body model (A114-B, Class II)
    • 200-V machine model (A115-A)
    • 1000-V charged-device model (C101)
  • Provides bidirectional voltage translation with no direction terminal
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30-pF capacitor load and up to 40-MHz up/down translation at 50-pF capacitor load
  • Supports Ioff, partial power-down mode (refer to Feature Description)
  • Allows bidirectional voltage level translation between
    • 0.8 V ↔ 1.8, 2.5, 3.3, 5 V
    • 1.2 V ↔ 1.8, 2.5, 3.3, 5 V
    • 1.8 V ↔ 2.5, 3.3, 5 V
    • 2.5 V ↔ 3.3, 5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5 V Tolerance I/O port to support TTL
  • Low Ron provides less signal distortion
  • High-impedance I/O terminals for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD17
  • –40°C to 125°C operating temperature range
  • ESD performance tested per JESD 22
    • 2000-V human-body model (A114-B, Class II)
    • 200-V machine model (A115-A)
    • 1000-V charged-device model (C101)

The LSF family consists of bidirectional voltage level translators that operate from 0.8 V to 4.5 V (Vref_A) and 1.8 V to 5.5 V (Vref_B). This range allows for bidirectional voltage translations between 0.8 V and 5.0 V without the need for a direction terminal in open-drain or push-pull applications. The LSF family supports level translation applications with transmission speeds greater than 100 MHz for open-drain systems that utilize a 15-pF capacitance and 165-Ω pull-up resistor.

When the An or Bn port is LOW, the switch is in the ON-state and a low resistance connection exists between the An and Bn ports. The low Ron of the switch allows connections to be made with minimal propagation delay and signal distortion. The voltage on the A or B side will be limited to Vref_A and can be pulled up to any level between Vref_A and 5 V. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control.

The LSF family consists of bidirectional voltage level translators that operate from 0.8 V to 4.5 V (Vref_A) and 1.8 V to 5.5 V (Vref_B). This range allows for bidirectional voltage translations between 0.8 V and 5.0 V without the need for a direction terminal in open-drain or push-pull applications. The LSF family supports level translation applications with transmission speeds greater than 100 MHz for open-drain systems that utilize a 15-pF capacitance and 165-Ω pull-up resistor.

When the An or Bn port is LOW, the switch is in the ON-state and a low resistance connection exists between the An and Bn ports. The low Ron of the switch allows connections to be made with minimal propagation delay and signal distortion. The voltage on the A or B side will be limited to Vref_A and can be pulled up to any level between Vref_A and 5 V. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control.

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類型 標題 日期
* Data sheet LSF0204x 4-Bits Bidirectional Multi-Voltage Level Translator for Open-Drain and Push-Pull Application datasheet (Rev. H) PDF | HTML 2021年 4月 29日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 2017年 10月 30日
EVM User's guide LSF-EVM Hardware User's Guide 2017年 7月 5日
EVM User's guide LSF010X Evaluation Module User's Guide (Rev. A) 2015年 6月 29日
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 2015年 4月 30日
Application note Voltage-Level Translation With the LSF Family (Rev. B) 2015年 3月 12日
Application note Selecting the Right Level Translation Solution (Rev. A) 2004年 6月 22日

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模擬型號

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SLVMAL3.ZIP (7 KB) - HSpice Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YZP) 12 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
UQFN (RUT) 12 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian

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