SN54BCT244
- State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
- P-N-P Inputs Reduce DC Loading
- ESD Protection Exceeds 2000 V
Per MIL-STD-883C, Method 3015 - 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
- Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (J, N)
These octal buffers and line drivers are designed specifically to
improve both the performance and density of 3-state memory address
drivers, clock drivers, and bus-oriented receivers and transmitters.
Taken together with the ´BCT240 and ´BCT241, these devices
provide the choice of selected combinations of inverting and
noninverting outputs, symmetrical 
(active-low output-enable) inputs, and complementary OE
and inputs.
The ´BCT244 is organized as two 4-bit buffers/line drivers
with separate output-enable () inputs. When is
low, the device passes data from the A inputs to the Y outputs. When
is high, the
outputs are in the high-impedance state.
The SN54BCT244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT244 is characterized for operation from 0°C to 70°C.
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技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. E) | 1994年 4月 1日 | |
| * | SMD | SN54BCT244 SMD 5962-90625 | 2016年 6月 21日 | |
| Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 2021年 7月 26日 | ||
| Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002年 8月 29日 | ||
| Application note | Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) | 1997年 8月 1日 | ||
| Application note | Designing With Logic (Rev. C) | 1997年 6月 1日 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996年 10月 1日 | ||
| Application note | Live Insertion | 1996年 10月 1日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| CDIP (J) | 20 | Ultra Librarian |
| CFP (W) | 20 | Ultra Librarian |
| LCCC (FK) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點