封裝資訊
| 封裝 | 針腳 TSSOP (PW) | 14 |
| 操作溫度範圍 (°C) -40 to 125 |
| 包裝數量 | 運送業者 3,000 | LARGE T&R |
SN74AHCT164 的特色
- Operating range 4.5V to 5.5V VCC
- TTL-Compatible inputs
- Low delay, 14ns max (VCC = 5V, CL = 50pF)
- Latch-up performance exceeds 250mAper JESD 17
SN74AHCT164 的說明
The SN74AHCT164 is an 8-bit shift register with AND-gated serial inputs and an asynchronous clear (CLR) input. Outputs are directly connected to the internal shift register, resulting in immediate output changes as values are shifted into the register. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum set-up time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.