SN74ALVTH16245 已停止生產
此產品已停產。新設計應考量替代產品。
open-in-new 比較替代產品
引腳對引腳且具備與所比較裝置相同的功能
74ACT16245 現行 具有 3 態輸出的 16 位元匯流排收發器 Lower average drive strength (24mA)
SN74LVCH16245A 現行 具有 3 態輸出的 16 位元匯流排收發器 Replacement
功能相同,但引腳輸出與所比較的裝置不同
SN74LVTH16245A 現行 具有 3 態輸出的 3.3-V ABT 16 位元匯流排收發器 Longer average propagation delay (4.5ns), higher average drive strength (64mA)

產品詳細資料

Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 3.6 Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -8 Input type TTL Output type TTL Features Bias Vcc, Bus-hold, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Technology family ALVT Rating Catalog Operating temperature range (°C) -40 to 85
Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 3.6 Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -8 Input type TTL Output type TTL Features Bias Vcc, Bus-hold, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Technology family ALVT Rating Catalog Operating temperature range (°C) -40 to 85
TVSOP (DGV) 48 62.08 mm² 9.7 x 6.4
  • State-of-the-Art Advanced BiCMOS Technology (ABT) Widebus™ Design for 2.5-V and 3.3-V Operation and Low Static-Power Dissipation
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • High Drive (–32/64 mA at 3.3-V VCC)
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating
  • Flow-Through Architecture Facilitates Printed Circuit Board Layout
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Widebus is a trademark of Texas Instruments.

  • State-of-the-Art Advanced BiCMOS Technology (ABT) Widebus™ Design for 2.5-V and 3.3-V Operation and Low Static-Power Dissipation
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • High Drive (–32/64 mA at 3.3-V VCC)
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating
  • Flow-Through Architecture Facilitates Printed Circuit Board Layout
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Widebus is a trademark of Texas Instruments.

The ’ALVTH16245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.2 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The ’ALVTH16245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.2 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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類型 標題 日期
* Data sheet 2.5-V/3.3-V 16-Bit Bus Transceivers With 3-State Outputs datasheet (Rev. G) 2002年 4月 4日

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點