首頁 邏輯和電壓轉換 電壓轉換器及電平移位器 方向控制電壓轉換器
首頁
邏輯和電壓轉換
電壓轉換器及電平移位器
方向控制電壓轉換器

SN74AXC1T45

現行

單位元雙電源匯流排收發器

立即訂購
產品規格表

SN74AXC1T45

現行
產品規格表 立即訂購

產品詳細資料

Technology family AXC Applications GPIO Bits (#) 1 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 12 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AXC Applications GPIO Bits (#) 1 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 12 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-5X3 (DRL) 6 2.56 mm² 1.6 x 1.6 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1 X2SON (DEA) 6 1 mm² 1 x 1 X2SON (DTQ) 6 0.8 mm² 1 x 0.8
  • Up and down translation across 0.65 V to 3.6 V
  • Operating temperature: –40°C to +125°C
  • Designed with glitch suppression circuitry to improve power sequencing performance
  • Maximum quiescent current (ICCA + ICCB) of 10µA (85°C maximum) and 16µA (125°C maximum)
  • Up to 500Mbps support when translating from 1.8 to 3.3V
  • VCC isolation feature:
    • If either VCC input is below 100mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 8000-V human body model
    • 1000-V charged-device model
  • Up and down translation across 0.65 V to 3.6 V
  • Operating temperature: –40°C to +125°C
  • Designed with glitch suppression circuitry to improve power sequencing performance
  • Maximum quiescent current (ICCA + ICCB) of 10µA (85°C maximum) and 16µA (125°C maximum)
  • Up to 500Mbps support when translating from 1.8 to 3.3V
  • VCC isolation feature:
    • If either VCC input is below 100mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 8000-V human body model
    • 1000-V charged-device model

The SN74AXC1T45 is a single-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6V.

The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

The glitch suppression circuitry enables either supply rail to be powered on or off in any order, providing robust power sequencing performance.

The SN74AXC1T45 is a single-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6V.

The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.

The glitch suppression circuitry enables either supply rail to be powered on or off in any order, providing robust power sequencing performance.
filter 尋找其它 方向控制電壓轉換器
下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
引腳對引腳且具備與所比較裝置相同的功能
SN74LXC1T45 現行 具有可配置電壓位準移位和 3 態輸出的單位元雙電源匯流排收發器 5 V version of 1 bit translator with Schmitt trigger inputs 

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 15
類型 標題 日期
* Data sheet SN74AXC1T45 Single-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation datasheet (Rev. E) PDF | HTML 2024年 1月 12日
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024年 10月 2日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023年 9月 5日
Application brief Translate Voltages for MDIO PDF | HTML 2021年 7月 16日
EVM User's guide AXC Small-Package Evaluation Module User's Guide (Rev. A) PDF | HTML 2021年 7月 12日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 2021年 3月 29日
Application note Translate Voltages for GPIO PDF | HTML 2020年 8月 4日
Technical article Enabling IIoT to reach beyond the factory floor PDF | HTML 2020年 7月 29日
Technical article A glitch in your system’s matrix? PDF | HTML 2019年 4月 11日
Application brief How to Support 1.8-V Signals Using a 3.3-V LVDS Driver/Receiver + Level-Shifter 2018年 12月 28日
Application note Glitch free power sequencing with AXC level translators (Rev. A) 2018年 9月 20日
Application note Evaluate SN74AXC1T45DRL Using A Generic EVM 2017年 11月 6日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
TI.com 無法提供
開發板

AVCLVCDIRCNTRL-EVM — 適用於方向控制雙向轉換裝置、支援 AVC 和 LVC 的通用 EVM

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)

使用指南: PDF
TI.com 無法提供
模擬型號

SN74AXC1T45 IBIS Model (Rev. A)

SCEM581A.ZIP (51 KB) - IBIS Model
下載
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 6 Ultra Librarian
SOT-5X3 (DRL) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
X2SON (DEA) 6 Ultra Librarian
X2SON (DTQ) 6 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片