封裝資訊
封裝 | 引腳 TSSOP (PW) | 16 |
作業溫度範圍 (°C) -40 to 125 |
包裝數量 | 運送包裝 250 | SMALL T&R |
SN74LVC112A 的特色
- Operates From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.8 ns at 3.3 V
- Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C - Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 3000-V Human-Body Model
- 200-V Machine Model
- 1500-V Charged-Device Model
SN74LVC112A 的說明
This dual negative-edge-triggered J-K flip-flop is designed for 1.65-V to 3.6-V VCC operation.